NASA's new AI space chip could let spacecraft think for themselves. May 25, 2026 0 comments NASA is developing a powerful new computer chip designed to dramatically increase the intelligence and performance of future spacecraft. Through a commercial partnership, the project is creating advanced processing technology capable of helping spacecraft operate more independently during missions far from Earth. NASA's High Performance Spaceflight Computing project is focused on boosting the computing capabilities of spacecraft used in space exploration. Current missions rely on older processors because they are durable enough to survive the extreme conditions of space. While those chips are dependable, they lack the performance needed for more advanced missions. The agency says newer and far more capable processors are essential for future autonomous spacecraft, faster onboard scientific analysis, and supporting astronauts during missions to the Moon and Mars. "Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," said Eugene Schwanbeck, program element manager in NASA's Game Changing Development program at the agency's Langley Research Center, in Hampton, Virginia. "NASA's commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration." Radiation Hardened Processor Faces Extreme Testing At the center of the project is a new radiation-hardened processor built to deliver up to 100 times the computing power of today's spaceflight computers while surviving the harsh environment of space. Engineers at NASA's Jet Propulsion Laboratory (JPL) in Southern California are running a wide range of tests designed to simulate those conditions. "We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign," said Jim Butler, High Performance Space Computing project manager at JPL. To qualify for spaceflight, the processor must withstand intense electromagnetic radiation and dramatic temperature fluctuations that can damage electronics. High-energy particles from the Sun and deep space can also trigger computer errors that force spacecraft into "safe mode," temporarily shutting down nonessential systems until engineers resolve the issue. NASA is also testing how the chip handles the challenges of planetary landings. "To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data," said Butler. "This is an exciting time for us to be working on hardware that will enable NASA's next giant leaps." Testing at JPL began in February and is expected to continue for several months. Early results have been highly encouraging. According to NASA, the processor is functioning as intended and has shown performance levels roughly 500 times greater than the radiation-hardened chips currently used in spacecraft. The team also marked the beginning of testing with a symbolic moment by sending an email titled "Hello Universe," referencing the famous introductory messages used during the early days of computer programming. AI Powered Spacecraft and Deep Space Missions The processor is being developed jointly by JPL and Microchip Technology Inc., based in Chandler, Arizona. The company is working with NASA through a commercial partnership, and sample chips have already been shared with defense and commercial aerospace partners. The technology is expected to play a major role in the future of autonomous spacecraft. With onboard artificial intelligence, spacecraft could respond to unexpected situations in real time when communication delays make human control impractical. The chip could also help deep space missions process, store, and transmit massive amounts of scientific data back to Earth more efficiently. NASA says the processor may eventually support crewed missions to the Moon and Mars as well. Small Processor With Massive Computing Power The device is known as a system-on-a-chip (or SoC), meaning it combines the essential components of a computer into a single compact unit. The processor includes central processing units, computational offloads, advanced networking systems, memory, and input/output interfaces. SoCs are widely used in smartphones and tablets because they are compact and energy efficient. However, NASA's version is designed to survive for years in deep space, potentially traveling millions (or even billions) of miles from Earth without maintenance or repairs. Once the processor is certified for use in space, NASA plans to integrate it into a wide variety of missions, including Earth orbiters, planetary rovers, deep space probes, and crewed habitats. The technology could also have benefits on Earth. Microchip plans to adapt the processor for industries such as aviation and automotive manufacturing. NASA and Industry Collaboration The project is managed by the Space Technology Mission Directorate's Game Changing Development (GCD) program at NASA Langley. The GCD program and JPL, which is managed by Caltech in Pasadena, California, oversaw the development process from mission planning and industry studies through final delivery. NASA JPL selected Microchip as a partner in 2022, and the company funded its own research and development work on the processor.

Microchip Technology has partnered with Sunny Smartlead, a global automotive camera module supplier and subsidiary of Sunny Optical Technology Group, to expand the Automotive SerDes Alliance Motion Link (ASA-ML) ecosystem. Sunny Smartlead is introducing Advanced Driver-Assistance Systems camera modules built on Microchip's VS700 family of ASA-ML devices. The collaboration combines Microchip's ASA-ML serialiser technology with Sunny Smartlead's camera expertise to help automotive manufacturers develop standardised ADAS camera solutions for Software-Defined Vehicles. ASA-ML technology features integrated security and timing capabilities, including link-layer authentication and precision time synchronisation across sensors. The partnership aims to create a production-ready, multi-vendor camera ecosystem around ASA-ML, offering an alternative to proprietary technologies. Sunny Smartlead's camera modules integrate Microchip's VS775S serialiser to support development within the ASA-ML ecosystem.

Everspin Technologies expands on-shore MRAM manufacturing capacity. Strategic manufacturing agreement with Microchip Technology to expand production capacity and strengthen long-term supply. Everspin Technologies Inc. announced its strategic manufacturing agreement with Microchip Technology, Inc. to expand production capacity and strengthen long-term supply.The company has entered into an initial 10-year agreement, that can be extended in 2-year increments, with Microchip Technology to augment its onshore manufacturing capacity for MRAM and Tunnel Magnetoresistive (TMR) sensor products. The firm will establish a copy exact (plus) MRAM line to manufacture MRAM and TMR sensor products currently produced at its line in Chandler, AZ. "Everspin is expanding its manufacturing footprint to support the next phase of MRAM adoption, as customers look for both long-term supply stability and higher-density, more capable solutions," says Sanjeev Aggarwal, president and CEO. "Our partnership with Microchip adds the production scale to support demand while continuing to advance our MRAM roadmap." Under the agreement, Everspin will stand up its industry magnetic technology and manufacturing process at a Microchip fabrication facility in Oregon. The company will retain ownership of the intellectual property and manufacturing process while utilizing Microchip's foundry services capacity. This expanded capacity will leverage Everspin's strong balance sheet and partnerships. "Microchip is pleased to collaborate with Everspin and provide foundry services from its large and expandable manufacturing capacity in our Oregon Fab," said Michael Finley, SVP, fab operations, Microchip'. The agreement will provide Everspin and its customers with several strategic benefits: * Increased wafer capacity to support growth plans * On-shore second source for MRAM and TMR sensor products * Continuity of supply lasting well into the next decade * Additional opportunities for Everspin to continue R&D programs advancing MRAM capabilities for next-gen use cases and workloads * International Traffic in Arms Regulations (ITAR) wafer processing capabilities The company will continue to manufacture MRAM and TMR sensor wafers in its Chandler, AZ facility co-located at NXP. The company plans to leverage its 20 years of MRAM production experience from Everspin's Chandler operation as a benchmark for process bring up at Microchip ensuring a timely and seamless process installation. The company expects the first products to ship from the Everspin-Microchip collaboration in the 2nd half of 2027. Read also: 64Mb xSPI STT-MRAM completes production qualification, and 128Mb and 256Mb xSPI STT-MRAM advancing through final qualification phases Read bandwidth of up to 400MB/s and write bandwidth of approximately 90MB/s, over 400 times faster than NOR flash, and write endurance up to 10 times higher than typical NOR AEC-Q100 Grade 1 MRAM delivers 10-year data retention at 125°C, 48-hour burn-in, and unlimited endurance for mission-critical systems Integrating Everspin's MRAM technologies with Quintauris' reference architectures and real-time platforms