Full-Time

Senior FPGA Design Engineer

HPR (Hyannis Port Research)

HPR (Hyannis Port Research)

51-200 employees

High-performance CMI software and hardware provider

Compensation Overview

$159.3k - $215k/yr

No H1B Sponsorship

Needham, MA, USA

In Person

On-site in Needham, MA is required; no remote option.

Category
Hardware Engineering (1)
Required Skills
Verilog
VHDL
FPGA
Linux/Unix
Requirements
  • BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
  • 5+ years of experience in digital logic design for FPGAs or ASICs
  • Proficiency in SystemVerilog (preferred) or VHDL
  • Deep understanding of computer architecture and digital design concepts
  • Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi)
  • Comfortable working in a Linux environment
  • Strong problem solving, debugging, and communication skills
  • This position requires being on-site at our office in Needham, MA full-time (5 days per week)
  • HPR does not currently provide employment sponsorship
Responsibilities
  • Design, develop, optimize, and maintain high-performance FPGA compute and networking systems used in electronic trading
  • Own the RTL design process from specification and coding through synthesis and FPGA implementation
  • Partner with design verification engineers to review and execute comprehensive test plans
  • Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration
  • Contribute to improving our development processes, tools, and methodologies
Desired Qualifications
  • Experience working with Xilinx and/or Altera FPGAs
  • Familiarity with FPGA architecture and advanced design techniques, including optimizations for synthesis and timing closure
  • In-depth knowledge of networking protocols (IP, TCP, UDP)
  • Experience with high-speed interfaces (PCIe, Ethernet, and/or DDR)
  • Familiarity with C programming and scripting in Python and/or Perl
HPR (Hyannis Port Research)

HPR (Hyannis Port Research)

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Hyannis Port Research provides a high-performance Capital Markets Infrastructure stack built on its Unimus framework for institutional financial firms. It combines software and hardware to support trading, clearing, and risk management, delivering an integrated platform that helps firms run faster with fewer systems and lower operating costs. It differentiates itself with a focused, low-latency stack and the Unimus framework, backed by an elite engineering team, including founder and CEO D. Amicangioli. Its goal is to help banks, clearing firms, asset managers, market makers, and exchanges execute trades quickly, manage risk, and streamline operations in fast-moving markets.

Company Size

51-200

Company Stage

Pre-seed

Total Funding

$2.3M

Headquarters

Needham, Massachusetts

Founded

2011

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Simplify's Take

What believers are saying

  • Supports over 80 global markets since 2019 expansion.
  • Recurring revenue from software, hardware, support services.
  • New Needham HQ established November 18, 2025, attracts talent.

What critics are saying

  • Exegy's gateways deliver 10x lower latency, eroding Citadel clients.
  • SS&C bundles risk management, squeezes HPR's $6.5M revenue.
  • CFTC March 2026 mandate triggers exodus to Vela systems.

What makes HPR (Hyannis Port Research) unique

  • Unimus framework powers HPR's comprehensive CMI stack for trading and risk.
  • Omnibot integrates market access, risk, data, and latency as IaaS.
  • Handles 10% U.S. equities, 15% Australia volumes daily.

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