Job Description

ESSENTIAL DUTIES AND RESPONSIBILITIES:

• Perform Signal and Power Integrity simulations for all SSD products, collaborating with different engineering teams to balance system/product constraints with PCIE, DDR , NAND and high speed clocks.
• Perform pre-layout and post-layout simulation flow
• Create simulation models and develop simulation methodology for SIPI design
• Stackup review and layer assignment for High speed and PDN
• Analyze chip/package/PCB PDNs and make design trade-off and negotiate power budgets.
• Provide system SI design guidance and perform post-layout review and optimization
• Work closely with silicon team, packaging team and PCB layout team to optimize SI design based on the simulation data
• Use simulation and lab data to support design troubleshooting and propose corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems.
• Generate simulation report based on the data and communicate with XFNs with clear SI recommendation.

Qualifications

REQUIRED:

• Bachelor’s degree in Electrical Engineering, Physics, Mathematics, or related field (or equivalent experience)
• 7+ years of experience in EM simulation and measurement areas
• Solid EM fundamentals and familiar with EM simulation tools. Solid experience using Cadence Sigrity, PowerSI, OptimizePI, Ansys SIwave, Keysight ADS, 3D layout and Ansys HFSS
• Experience delivering a product into manufacturing.

PREFERRED:

• Master’s in electrical engineering, Physics, Mathematics, or related field (or equivalent experience)
• Feel comfortable using different instruments such as network analyzer, oscilloscope, signal generator, scope and other related test equipment to measure the eye-diagram
• Familiar with PCB and flex design and manufacture process