Job Details:
Job Description:
Role and Responsibilities:
The world is transforming - and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on earth. We work every single day to design and manufacture silicon products that empower people’s digital lives. Do you love to solve technical challenges that no one has solved yet? Do you enjoy working with cross functional teams to deliver solutions for products that impact customers lives? If so, Come join us to do something wonderful.
As a Graduate Intern your responsibilities may include, but may not be limited to:
- In this role you will be part of the XEG design team, working on next-generation Xeon server product SOCs and IPs.
- Work as a part of the SOC integration team (component and fabric integration)
- Work closely with SOC Validation team to identify bugs, work on bug fixes for both SOC RTL as well as tiles.
- Work collaboratively with physical design team as well as architecture team to ensure architectural correctness of the implementation as well as satisfying physical requirements.
Applicants for this internship should be able to start between March 2024 and June of 2024 and be available as a full-time intern for 6 months. This internship will offer schedule flexibility as well as a hybrid work location to allow for classes while completing the internship.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must be pursuing a Master’s or Ph.D. degree in Computer Engineering and/or Electrical Engineering
Qualifying course work:
- Courses in IC/SoC Design or integration.
Preferred Qualifications:
- Experience using Synopsys Coretools or VCS/Modelsim or Synopsys Design Compiler or Spyglass or Lint
- Experience using following languages like Verilog or System Verilog or Perl or Tcl or Python or C/C++
Requirements listed could be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Job Type:
Student / Intern
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Santa Clara
Additional Locations:
US, Arizona, Phoenix, US, Colorado, Fort Collins, US, Massachusetts, Hudson, US, Oregon, Hillsboro, US, Texas, Austin
Business group:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in
US, Colorado, California:$63,000.00-$166,000.00
Salaryrangedependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.The application window for this job posting is expected to end by 06/21/2024
