Full-Time
Senior Principal Engineer
Multiple Teams
Altera Corporation
Manufactures FPGA, SoC programmable logic chips
Compensation Overview
$266.2k - $392.2k/yr
San Jose, CA, USA
In Person
On-site in San Jose, CA; no remote work.
Master's, PhD
 Software Engineering (1) |
|---|
- MS or PhD in Computer Science, Computer Engineering, Electrical Engineering, or related field.
- 15+ years of experience in EDA software development, timing analysis, physical design, FPGA compilation, or related domains.
- Deep expertise in: Static Timing Analysis (STA); Timing closure methodologies; Timing modeling and correlation; Physical design optimization; RTL-to-GDS or RTL-to-bitstream design flows; Multi-corner multi-mode (MCMM) analysis.
- Strong understanding of: Placement and routing algorithms; Clock analysis and optimization; Path-Based Analysis (PBA); Constraint management and timing exceptions; Incremental timing architectures.
- Extensive software development experience in C++ and large-scale optimization systems.
- Proven track record developing high-performance, highly scalable EDA engines.
- What You'll Bring: Recognized subject matter expertise in timing analysis and optimization.
- What You'll Bring: Ability to drive complex technical initiatives from concept to production.
- What You'll Bring: Strong systems-thinking approach to compiler architecture and optimization.
- What You'll Bring: Passion for solving challenging timing closure and scalability problems.
- What You'll Bring: Proven ability to influence engineering direction across multiple organizations.
- Quartus Timing Analysis & Optimization Leadership Define and drive the technical roadmap for timing analysis, timing modeling, and timing optimization within the Quartus FPGA Compiler.
- Lead the design and implementation of advanced timing engines supporting FPGA compilation, placement, routing, and timing closure.
- Develop methodologies to improve timing convergence across the Quartus RTL-to-bitstream flow.
- Partner with architecture and compiler teams to enable best-in-class timing QoR and signoff correlation.
- Static Timing Analysis (STA) Architect and develop next-generation STA capabilities, including graph-based and path-based timing analysis.
- Advance support for complex timing scenarios, including: Multi-corner, multi-mode (MCMM) analysis; Timing exception handling; Clock domain crossing analysis; Variation-aware timing methodologies; Incremental timing analysis.
- Improve timing accuracy while maintaining industry-leading scalability and runtime performance.
- Timing Modeling & Signoff Correlation Develop timing modeling methodologies that accurately correlate Quartus results with silicon behavior and signoff requirements.
- Drive innovations in delay modeling, clock modeling, timing abstraction, and hierarchical timing analysis.
- Partner with FPGA architecture teams to ensure accurate representation of device resources and timing characteristics.
- Compiler Algorithms & Infrastructure Design scalable data structures and algorithms for timing analysis and optimization.
- Improve compiler performance through parallelization, multi-threading, and incremental processing techniques.
- Drive architectural improvements that enable efficient handling of large, complex FPGA designs.
- Cross-Functional Technical Leadership Provide technical mentorship and thought leadership across engineering teams.
- Collaborate with synthesis, placement, routing, architecture, verification, and software engineering organizations.
- Influence future FPGA compiler capabilities through technical strategy, innovation, and long-term planning.
- Direct experience developing FPGA compilation tools.
- Prior experience with the Quartus compiler, Timing Analyzer, Fitter, Routing, or related FPGA implementation technologies.
- Expertise in Path-based timing optimization; Clock-Reconvergence Pessimism Removal (CRPR); Latch-based timing analysis; Incremental optimization frameworks; Timing-driven placement and routing; Variation-aware analysis techniques.
- Experience designing multi-threaded or distributed EDA infrastructure.
- Industry-recognized technical leadership demonstrated through patents, publications, standards contributions, or major product innovations.
Altera Corporation designs and manufactures programmable logic devices, including Field-Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs), and provides the software tools needed to configure them. Customers use these chips to tailor hardware after manufacture for specific applications, giving faster time-to-market and optimized performance. The company differentiates itself through a broad range of target markets (automotive, communications, aerospace) and by offering both programmable hardware and associated design software licensing. Its goal is to deliver high-performance, adaptable processing solutions for embedded systems, AI, cloud, and edge computing.
Company Size
N/A
Company Stage
Acquired
Total Funding
$21.2B
Headquarters
San Jose, California
Founded
1983
Simplify's Take
What believers are saying
- Reuters reported July 10, 2026 revenue growing roughly 20% and operating income doubling.
- June 2026 Agilex 9 samples and Q3 production silicon create near-term design-win momentum.
- Mercury Systems, VadaTech, and DIU partnerships expand Altera’s defense ecosystem and order pipeline.
What critics are saying
- AMD-owned Xilinx keeps pressuring Altera’s core FPGA share across high-end embedded designs.
- Intel still owns 49% after September 2025, keeping manufacturing and governance entangled.
- If AI workloads standardize on GPUs and ASICs, Altera’s programmable-chip model loses relevance.
What makes Altera Corporation unique
- Altera is the largest pure-play FPGA vendor, focused entirely on programmable logic.
- Agilex 9 Direct RF targets SWaP-constrained defense systems with integrated converters and logic.
- FPGA AI Suite 26.1.1 pushes deterministic edge-AI inference onto reprogrammable hardware.
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Benefits
Performance Bonus
Company News
Compute & density boosted for next-generation RF systems. The engineering sample of Altera's latest wideband SoC FPGAs is now available, delivering a significant forty percent increase in compute capability to power next-generation aerospace and defense RF systems By Abi Wylie / 12 Jun 2026 Altera Corporation has announced the engineering sample availability of its next-generation Agilex 9 Direct RF-Series SoC FPGAs at the International Microwave Symposium. The latest addition to the company's portfolio is designed to meet growing performance, integration, and adaptability demands in aerospace, defense, and advanced communications systems. By delivering a 40% increase in compute capability per square millimeter, the technology allows engineers to process and analyze RF signals closer to the edge while adapting to changing mission requirements within tight size, weight, power, and latency constraints. The architecture integrates high-speed data converters, programmable logic, and processing elements into a single package. Compared to the previous generation, the new device provides 45% greater logic and DSP density alongside support for DDR5 and LPDDR5 memory technologies. Featuring integrated 64Gsps wideband RF with higher compute and memory resources, this programmable solution eliminates the need for multi-chip designs and enables advanced beamforming for radar and data cube processing. The highly integrated platform supports high-bandwidth signal capture and generation, allowing users to scale performance while maintaining long-term design flexibility. Accelerate defense modernization through strategic sourcing. Discover cutting-edge solutions from leading global suppliers SUPPLIER SPOTLIGHT "Across aerospace, defense, and advanced communications, our customers are being asked to handle more data and operate within tighter constraints," said John Sotir, General Manager of Altera's Aerospace, Defense and Government business unit. "With our latest Agilex 9 Direct RF device, we're helping them meet those challenges by bringing together high-performance compute, memory, and RF capabilities into a single, highly integrated platform." Ian Dunn, CTO at Spectrum Control, an Altera board partner, stated, "As RF systems become more complex and bandwidth demands continue to grow, integration and performance at the system level are critical. Altera's newest Agilex 9 Direct RF-Series SoC FPGA enables us to simplify system architectures while delivering the high-performance signal processing our customers require. The combination of integrated RF, compute, and memory helps us accelerate development and bring more capable solutions to market faster."
Altera introduces next-generation Agilex 9 Direct RF-Series SoC FPGA to power the future of high performance RF systems. June 9, 2026 At IMS2026, Altera Corporation announced engineering sample availability of its next-generation wideband Agilex(R) 9 Direct RF-Series SoC FPGAs. Designed to meet the growing demands for performance, integration, and adaptability in aerospace, defense, and advanced communications systems, the latest addition to Altera's Direct RF portfolio delivers a 40% increase in compute capability per square millimeter and 45 percent greater logic and DSP density compared to the previous generation. As next-generation RF systems grow more complex, engineers face increasing pressure to process wider bandwidths, respond in real time, and deliver greater capabilities within tight size, weight, power, and latency constraints. Altera's Agilex(R) 9 Direct RF-Series SoC FPGAs address these challenges by enabling developers to process and analyze RF signals closer to the edge while adapting to evolving mission requirements. Related resources. Agilex 9 Direct RF-Series SoC FPGAs deliver a tightly integrated architecture that combines high-speed data converters, programmable logic, and processing elements into a single package. This enables developers building next-generation wideband RF systems to reduce complexity, manage power, and meet real-time performance demands where latency and responsiveness are critical. "Across aerospace, defense, and advanced communications, our customers are being asked to handle more data and operate within tighter constraints," said John Sotir, GM of Altera's Aerospace, Defense and Government business unit. "With our latest Agilex 9 Direct RF device, we're helping them meet those challenges by bringing together high-performance compute, memory, and RF capabilities into a single, highly integrated platform." Building on Altera's proven Direct RF portfolio, the new Agilex(R) 9 device delivers 45 percent greater logic and DSP density compared to the previous generation, along with support for next-generation DDR5 and LPDDR5 memory technologies. With integrated RF, compute, and memory resources, the programmable solution eliminates the need for multi-chip designs while enabling more advanced beamforming for radar and data cube processing. The highly integrated RF platform supports high-bandwidth signal capture and generation, allowing customers to scale performance while maintaining the flexibility to evolve their designs over time. Ian Dunn, CTO at Spectrum Control stated, "As RF systems become more complex and bandwidth demands continue to grow, integration and performance at the system level are critical. Altera's newest Agilex 9 Direct RF-Series SoC FPGA enables us to simplify system architectures while delivering the high-performance signal processing our customers require. The combination of integrated RF, compute, and memory helps us accelerate development and bring more capable solutions to market faster." Availability Engineering samples of the Agilex 9 Direct RF-Series SoC FPGA AGRW039 device are available today, with production silicon and development kits scheduled for availability in Q3 2026. For more information, visit Altera's Agilex 9 Direct RF-Series product page or contact your local Altera representative.
Altera Corporation has announced engineering sample availability of its Agilex 9 Direct RF-Series SoC FPGAs, unveiled at the International Microwave Symposium. The devices offer a 40% increase in compute capability per square millimetre and are designed for aerospace, defence and advanced communications systems. The new FPGAs integrate high-speed data converters, programmable logic and processing elements into a single package, delivering 45% greater logic and DSP density than the previous generation. They feature integrated 64Gsps wideband RF and support DDR5 and LPDDR5 memory technologies, eliminating the need for multi-chip designs. Engineering samples are available now, with production silicon and development kits scheduled for Q3 2026. The platform enables developers to process RF signals closer to the edge whilst meeting real-time performance demands.
Altera expands Agilex 9 FPGA ecosystem for defense applications. Altera Corporation, a provider of field-programmable gate array (FPGA) solutions, has announced new collaborations with Mercury Systems (NASDAQ: MRCY) and VadaTech aimed at expanding the ecosystem for its Agilex 9 Direct RF Series FPGAs. The initiative is designed to support the development of next-generation defense platforms through commercial off-the-shelf (COTS) solutions based on open architecture standards. The partnerships focus on combining Altera's Agilex 9 medium-band Direct RF FPGAs with industry-standard platforms, including SOSA-aligned OpenVPX systems. According to the companies, the approach is intended to help defense customers reduce integration complexity, accelerate deployment timelines, and enhance flexibility for software-defined radio frequency (RF) applications. As defense systems increasingly require real-time processing of large volumes of RF data, demand is growing for hardware platforms capable of delivering higher performance while reducing size, weight, power, and cost (SWaP). Altera said its Agilex 9 Direct RF Series FPGAs address these requirements by integrating RF functionality, computing resources, and high-speed transceivers within a single programmable architecture. The company noted that the medium-band Direct RF technology provides a balance of bandwidth, power efficiency, and processing performance suited for a range of defense applications, including adaptive radar systems, cognitive electronic warfare, and secure software-defined communications. Through the expanded ecosystem, customers will have access to field-proven platforms designed to improve interoperability and adaptability while supporting evolving mission requirements. The use of open architectures is also expected to facilitate system integration and reduce development risks for defense contractors and government agencies. Craig Goodwin, Senior Director of Mercury's Mixed Signal line of business, said the integration of medium-band converters into a high-performance FPGA enables significant SWaP advantages for edge-based processing applications. He noted that Altera's hardware and software development tools helped accelerate product evaluation and solution design. According to Goodwin, Mercury selected the Agilex 9 medium-band Direct RF FPGA because of its data conversion capabilities and processing resources, which he said can provide up to a tenfold SWaP advantage compared with alternative FPGA solutions for certain RF applications. VadaTech CEO Saeed Karamooz emphasized the benefits of standards-based VPX solutions, stating that Agilex 9 Direct RF Series FPGAs support seamless integration within larger defense system architectures while helping customers deploy advanced RF capabilities more quickly. John Sotir, General Manager of Altera's Military, Aerospace, and Government business unit, said modern defense platforms must process larger volumes of data across wider bandwidths while maintaining flexibility. He added that the collaborations with Mercury Systems and VadaTech reflect Altera's ongoing efforts to advance Direct RF technology and support more agile, scalable, and software-defined defense systems.
Altera Corporation has partnered with Mercury Systems and VadaTech to expand its Agilex 9 Direct RF FPGA ecosystem for defence applications. The collaborations deliver open-architecture solutions that accelerate deployment whilst reducing size, weight and power consumption. The Agilex 9 medium-band Direct RF FPGAs integrate RF, compute and high-speed transceivers into a single programmable architecture, enabling real-time processing for applications including adaptive radar and electronic warfare. Mercury Systems selected the technology for its 10x size, weight and power advantage over alternatives. The solutions are based on open architectures, including SOSA-aligned OpenVPX platforms, providing greater interoperability and flexibility for next-generation software-defined RF systems. Agilex 9 Direct RF devices, development kits and partner boards are available for order today.