Full-Time

Deep Learning Compiler Engineer New Grad

Quadric

Quadric

51-200 employees

GPNPU hardware and software for ML

Compensation Overview

$120k - $160k/yr

+ Equity + Bonus

Burlingame, CA, USA

In Person

Relocation to California Bay Area encouraged; in-office collaboration in Burlingame required.

Category
AI & Machine Learning (1)
Required Skills
Python
Requirements
  • Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field, completed within the past year (or completing within the next six months)
  • Strong proficiency in Python and C++
  • Solid grasp of compiler concepts: intermediate representations, dataflow analysis, transformation passes, and lowering
  • Comfort reading and reasoning about large, unfamiliar codebases
  • Strong debugging and problem-solving skills, with the ability to communicate findings clearly in writing and review
Responsibilities
  • Own compiler passes. Design and implement IR transformations that lower neural network IR to GPNPU-targeted code. Take pieces of the pipeline as yours and maintain them.
  • Debug end-to-end. Diagnose compilation issues by tracing problems from generated C++ back through the pipeline. Use IR dumps, static analyses, and the ISS to root-cause compilation failures and performance regressions.
  • Improve compiler decisions. Work with senior engineers to reduce data movement, improve core utilization, and tighten the gap between what the hardware can do and what we currently emit.
  • Collaborate across teams. Partner with the kernel, hardware, and data science teams to align compiler features with real model requirements and hardware constraints.
  • Strengthen the toolchain. Contribute to test infrastructure, debugging utilities, and developer ergonomics across the CGC pipeline and runtime
Desired Qualifications
  • Coursework, research, or significant project experience in compilers, program analysis, or domain-specific languages
  • Hands-on exposure to ML compiler frameworks such as TVM, MLIR, XLA, Glow, or IREE — bonus if you have written a non-trivial pass
  • Familiarity with neural network quantization, fixed-point arithmetic, or numerical analysis for ML
  • Experience with hardware-aware code generation for accelerators (GPU, DSP, NPU)
  • Some exposure to assembly, instruction scheduling, or low-level code generation
  • Prior internship experience in compilers, ML systems, or performance engineering
  • Published research or open-source contributions in compilers or ML systems

Quadric.io builds an integrated hardware-software stack for ML on System-on-Chips, centered on its Chimera GPNPU. It combines matrix and vector compute with scalar control code in a single execution pipeline, removing the need to split code across different processors. It sells Chimera hardware and licenses tools like the Chimera LLVM C Compiler, Chimera Instruction Set Simulator, and a Software Development Kit to design, simulate, profile, and deploy ML workloads written in C. Its goal is to simplify and speed up the design of ML-enabled SoCs for semiconductor developers and manufacturers, delivering faster time-to-market and better ML performance through a tightly integrated stack.

Company Size

51-200

Company Stage

Series C

Total Funding

$78.3M

Headquarters

Burlingame, California

Founded

2017

Simplify Jobs

Simplify's Take

What believers are saying

  • Product revenues tripled in 2025 driven by edge LLM and automotive design wins.
  • Kyocera and Tier IV partnerships validate demand across office automation and autonomous driving.
  • Series C oversubscription signals institutional confidence in edge AI infrastructure expansion.

What critics are saying

  • Arm Ethos-U dominates edge AI IP licensing with superior ecosystem integration.
  • NXP eIQ Neutron captures automotive ADAS markets with bundled MCU stacks.
  • Cloud-based LLM inference commoditizes edge deployment, reducing Chimera demand.

What makes Quadric unique

  • Fully programmable unified architecture runs any ML operator, unlike fixed-function NPUs.
  • Scales 1 to 864 TOPS on single architecture from edge to automotive datacenter.
  • Integrates NPU, DSP, and real-time CPU in one core, eliminating multicore complexity.

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Benefits

Health Insurance

Dental Insurance

Vision Insurance

401(k) Retirement Plan

Company Equity

Growth & Insights and Company News

Headcount

6 month growth

-3%

1 year growth

-3%

2 year growth

-4%
PR Newswire
Jan 14th, 2026
Quadric raises $30M Series C as on-device AI chip revenues triple and edge LLM design wins accelerate

Quadric, a provider of AI inference processor IP for on-device chips, has raised $30 million in an oversubscribed Series C round led by ACCELERATE Fund, bringing total funding to $72 million. Uncork Capital and Pear VC participated, alongside new investors including Volta and Wanxiang America. The company's product revenues more than tripled in 2025, driven by adoption of its Chimera processor IP across edge large language models, automotive and enterprise vision applications. Unlike fixed-function neural processing units, Chimera is fully programmable and can run any AI model on a unified architecture, scaling from 1 to 864 tera operations per second. Quadric recently secured two new licence agreements, including with Japan's Tier IV for autonomous driving applications. The funding will support customer success initiatives and product development.

AiThority
Dec 10th, 2025
Quadric Appoints Ravi Chakaravarthy as VP Software Engineering

Quadric appoints Ravi Chakaravarthy as VP Software Engineering. AMD and Broadcom veteran joins expanded executive team. Quadric announced the appointment of Ravi Chakaravarthy as Vice President, Software Engineering effective immediately. Chakaravarthy will lead Quadric's rapidly expanding software engineering organization, driving development of the company's market leading embedded AI software stack that powers Quadric Chimera(TM) AI processor IP. Quadric(R) announced the appointment of Ravi Chakaravarthy as Vice President, Software Engineering effective immediately Prior to joining Quadric, Chakaravarthy led software development for AMD's AI software stack for both datacenter and edge AI applications. He has deep hands-on expertise with AI/ML technologies for training and inference and has overseen open-source development for over 60 complex software projects. Before his six-year tenure at AMD, he led development teams at both Broadcom and at Hewlett-Packard, further broadening his leadership experience across the semiconductor and enterprise computing industries.

Business Wire
Sep 14th, 2023
Quadric Announces Llama2 LLM Support Immediately Available for Chimera GPNPUs

Quadric announces Llama2 LLM support immediately available for Chimera GPNPUs.

Quadric
May 22nd, 2023
Quadric Demos AI+ML DevStudio at Embedded Vision Summit 2023

May 22, 2023 - Quadric TM will be demonstrating the new Quadric Developer Studio, an online collaborative development environment for Chimera TM general purpose neural processing unit (GPNPU) processors, at the Embedded Vision Summit at the Santa Clara Convention Center.

Edge Industry Review
Jan 11th, 2023
Quadric, Ams Osram to develop smart sensing solutions for edge-based applications | Edge Industry Review

Quadric, an edge AI chip provider, has partnered with Ams Osram, an optical solutions provider, to create a smart sensing solution for edge computing applications.