Compensation Overview

Job Description

As an Astera Labs Senior Field Applications Engineer, you will support the world’s leading cloud service providers, server and network OEMs by working with them to design solutions that use Astera Labs’ portfolio of connectivity products. In this role, you will need to identify and understand customer requirements, propose Astera Labs solutions that provide clear value to the customer and provide hands-on design-in support. You will drive innovation by listening to the customer requirements, working with our engineering teams to implement into the product roadmap and delivering the results back to the customer.

Basic Qualifications

• BS in electrical engineering. Master’s degree in engineering is preferred.
• Minimum of 5 years’ experience working with Cloud service providers and server OEM customers to design in complex SoC/silicon products for Server, Storage, and/or Networking applications.
• Excellent written and verbal communication skills
• Strong organization skills and ability to provide clear and condensed notes and actions
• Customer-oriented, Goal-driven, Self-motivated, be able to work independently and be able to travel frequently to customer sites.
• Entrepreneurial, open-mind behavior and can-do attitude. Think and act with the customer in mind!

Required Experience

• Hands-on, thorough knowledge of high-speed protocols like PCIe, CXL, DDR
• Silicon/System bring-up and debug experience in customer systems.
• Experience with lab equipment including protocol analyzers and oscilloscopes.
• A strong background in high-speed board design techniques, and understanding of Data Center systems like Servers, JBOGs/JBODs, Networking switches/routers etc.
• Deep knowledge and understanding of memory technologies (SRAM, DRAM, SDRAM, DDR, etc)
• Intermediate level of proficiency in Python for automating system validation and link optimization.
• Able to step through embedded firmware at the SerDes (SoC) or MCU level for debugging.
• Firsthand experience with lab equipment including traffic generators, analyzers, and high-speed oscilloscopes.

Preferred Experience

• Hands-on knowledge of NRZ/PAM4 SerDes-based protocols like PCIe and CXL
• Development, support, and experience with CXL memory products.  
• Working knowledge of software/firmware build environments, gcc/Make and GitHub.
• Knowledge of simulation/modeling, schematic capture, and PCB layout tools from Cadence, Altium and others etc.
• Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis.

The base salary range is $130,000.00 USD – $190,000.00 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.