Senior ASIC Verification Engineer
Confirmed live in the last 24 hours
Recogni

51-200 employees

High-efficiency AI system for autonomous vehicles
Company Overview
Recogni stands out in the automobile industry with its unique approach to designing a vision-oriented inference artificial intelligence system, delivering an unprecedented 500x better power efficiency compared to other solutions. This enables edge processing at multiple points on vehicles, reducing the need for central processing and accelerating the development of fully-autonomous vehicles. The company's strong foundation in high-performance computing, artificial intelligence, machine learning, and imaging and vision systems, coupled with its commitment to user privacy and data security, make it a promising place to work and grow.
AI & Machine Learning
Automotive & Transportation

Company Stage

Series B

Total Funding

$48.9M

Founded

2017

Headquarters

San Jose, California

Growth & Insights
Headcount

6 month growth

5%

1 year growth

9%

2 year growth

50%
Locations
San Jose, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Desired Skills
Perl
Python
Verilog
CategoriesNew
Electrical Engineering
Hardware Engineering
Requirements
  • 5+ years of ASIC verification experience
  • Knowledge of ARM/MIPS/RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation
  • Familiarity with AMBA/APB/AXI Protocol
  • Familiarity with processor peripheral interfaces like SPI, eMMC
  • MII, GPIO, I2C
  • Excellent Verilog/System Verilog programming skills
  • Experience with UVM (or similar)
  • Deep understanding of object oriented programming principles, constrained random stimulus, and a coverage driven verification approach
  • Scripting experience (Python, Perl, TCL, shell programming) highly-desirable
  • Interest to explore AI architectures for convolution, transformer and other kinds of workloads
  • Self-starter and highly-motivated to work in a dynamic start-up environment
  • B.S. degree in Electrical or Computer engineering (or similar field)
Responsibilities
  • Ensure the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks
  • SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation)
  • Develop the block-level, sub-system and full-chip verification environment and tests to implement test plans
  • Work closely with design and architecture teams to understand the functional and performance goals of the design; and work together to make the design-under-test work under all specified circumstances
  • Triage and debug functional and performance issues with the design-under-test
  • Handle bug tracking and coverage convergence
  • Perform diagnostic and post-silicon validation tests in the lab