Sr. ASIC Digital Design Engineer
Bay Area
Confirmed live in the last 24 hours
Lightmatter

51-200 employees

Developing advanced computing engines for progress and discovery
Company Overview
Lightmatter is a pioneering company that is at the forefront of developing photonic computers, which have the potential to outperform traditional electronic computers in speed and energy efficiency. Their work culture encourages curiosity and exploration, fostering an environment where employees can push the boundaries of what is technologically possible. As industry leaders in this emerging field, they offer a unique competitive advantage and the opportunity to be part of a team that could redefine computing.
AI & Machine Learning
Data & Analytics
B2B

Company Stage

Series C

Total Funding

$267.2M

Founded

2017

Headquarters

Boston, Massachusetts

Growth & Insights
Headcount

6 month growth

9%

1 year growth

19%

2 year growth

50%
Locations
Mountain View, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Desired Skills
Data Structures & Algorithms
CategoriesNew
Electrical Engineering
Hardware Engineering
Requirements
  • Experience in ASIC design with multiple successful tape outs
  • 12 years of related experience with a Bachelor's degree; or 8 years and a Master's degree in Electrical or Computer Engineering (or related fields)
  • Familiarity with high-speed digital design techniques
  • Familiarity with power-efficient digital design techniques
Responsibilities
  • Develop microarchitecture design and RTL for advanced ML/AI accelerator ASICs/SoCs including advanced memory system and high-performance NoC
  • Understand and integrate silicon photonic communication and compute technology into digital accelerator design
  • Actively work with Architecture, Design Verification, Implementation, Photonic, Analog and Software teams to realize high performance, low power designs in advanced technology nodes
  • Create design specifications and documentation to facilitate collaboration with partner teams
  • Manage RTL implementation to achieve functionally correct, performant designs within project schedules by identifying, communicating and mitigating risks
Desired Qualifications
  • Experience in communication protocols (e.g. PCIe)
  • Experience interfacing with memory systems (e.g. HBM/DDR5)
  • Knowledge of processor design, accelerators, and/or memory hierarchies
  • Knowledge of machine learning algorithms