Full-Time
Principal DFT Architect
Altera Corporation
Manufactures FPGA, SoC programmable logic chips
Compensation Overview
$209.5k - $299.2k/yr
San Jose, CA, USA
In Person
On-site role based in San Jose, CA; no remote work.
Bachelor's, Master's
 Hardware Engineering (1) |
|---|
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 15+ years of industry experience.
- 10+ years architecting and implementing DFT solutions for complex SoC, FPGA, ASIC, or multi-die designs.
- 10+ years experience in scan architecture, ATPG, compression, MBIST, LBIST, boundary scan, and hierarchical DFT.
- 10+ years experience with RTL-to-GDS DFT integration including scan insertion, STA constraints, low-power DFT, and gate-level verification.
- 10+ years experience with industry-standard EDA tools for synthesis, scan insertion, ATPG, simulation/debug, formal verification, and STA.
- 10+ years experience supporting silicon bring-up, manufacturing test flows, yield analysis, and failure debug.
- 10+ years experience developing DFT automation using scripting languages (Perl, Python, TCL).
- 10+ years experience providing technical leadership and driving cross-functional alignment.
- DFT Strategy Ownership: Define and drive the long-term DFT architecture for FPGA, SoC, processor, DSP, SERDES, IO, and multi-die/chiplet-based products.
- Methodology Leadership: Lead development of scalable DFT methodologies and flows across RTL, gate-level, hierarchical, and multi-die integration environments.
- Advanced DFT Architecture: Architect state-of-the-art scan, compression, ATPG, MBIST, LBIST, boundary scan, and in-system test solutions to meet aggressive coverage, quality, and cost goals.
- Multi-Die & Advanced Packaging DFT: Drive DFT planning and integration for 2.5D/3D ICs, chiplets, and heterogeneous multi-die systems.
- Cross-Functional Integration: Collaborate with architecture, RTL, PD, STA, validation, and product engineering teams to ensure seamless DFT integration throughout the design lifecycle.
- DFT Governance: Establish and enforce DFT guidelines, test specifications, timing constraints, and signoff criteria across large engineering programs.
- Silicon Debug Leadership: Lead root-cause analysis for pre-silicon and post-silicon test failures, yield issues, and manufacturing escapes.
- Manufacturing Test Optimization: Optimize production test strategies for coverage, test time, yield improvement, power-aware test, and overall efficiency.
- Technology Innovation: Drive adoption of next-generation DFT technologies, automation, and best practices to improve productivity and scalability.
- Technical Mentorship: Mentor DFT engineers and provide technical leadership across multiple programs.
- Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- Experience with advanced fault models, diagnosis, and silicon analytics.
- Experience with 2.5D/3D ICs, chiplet architectures, and high-speed IO/SerDes DFT.
- Familiarity with IEEE DFT standards including IJTAG (1687), JTAG (1149.x), and embedded instrumentation.
- Experience with power-aware DFT, low-power ATPG, and large-scale test optimization.
- Experience with developing highly efficient & scalable DFT methodology & flows that incorporates AI technologies.
- Experience mentoring teams and influencing DFT strategy across multiple product families.
Altera Corporation designs and manufactures programmable logic devices, including Field-Programmable Gate Arrays (FPGAs) and System-on-Chips (SoCs), and provides the software tools needed to configure them. Customers use these chips to tailor hardware after manufacture for specific applications, giving faster time-to-market and optimized performance. The company differentiates itself through a broad range of target markets (automotive, communications, aerospace) and by offering both programmable hardware and associated design software licensing. Its goal is to deliver high-performance, adaptable processing solutions for embedded systems, AI, cloud, and edge computing.
Company Size
N/A
Company Stage
Acquired
Total Funding
$21.2B
Headquarters
San Jose, California
Founded
1983
Simplify's Take
What believers are saying
- Reuters said July 10, 2026 Altera is growing roughly 20% annually.
- August 11, 2026 DDR5 expansion improves AI, networking, and embedded customer appeal.
- Defense wins with Mercury Systems, VadaTech, and DIU RAZORBAC widen high-margin demand.
What critics are saying
- Intel still owns 49%; an IPO delay leaves Altera strategically trapped.
- AMD Xilinx and Lattice keep pressuring pricing, ecosystem breadth, and design wins.
- The 82-person San Jose layoff and Q3 2026 product ramp signal execution strain.
What makes Altera Corporation unique
- Altera is the largest pure-play FPGA company after Intel’s 2025 divestiture.
- Agilex 9 Direct RF integrates converters, logic, and compute for compact defense systems.
- Quartus Prime Pro 26.1.1 uniquely broadens DDR5 and LPDDR5 support across Agilex.
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Company News
Altera expands DDR5 memory support across Agilex FPGA portfolio. August 11, 2026 Press play to listen to this content Broad DDR5, LPDDR5 and LPDDR5X-compatible memory support gives developers more bandwidth, greater flexibility and improved supply resilience SAN JOSE, Calif., Aug. 11, 2026 - Altera today announced expanded DDR5 memory support across its Agilex FPGA portfolio with the release of Quartus Prime Pro Edition Software version 26.1.1. The update adds new DDR5, LPDDR5 and LPDDR5X-compatible memory capabilities to more Agilex FPGAs, enabling developers to build higher-performance AI, networking and embedded systems with greater flexibility to optimize bandwidth, power, board space and component availability. Agilex FPGAs deliver flexible, high-performance memory connectivity, supporting DDR5, LPDDR5X, LPDDR5, LPDDR4, DDR4, HBM2, and other advanced memory interfaces. Delivering More Memory Performance Across the Agilex Portfolio Quartus Prime Pro Edition 2026.1.1 enables DDR5-6400 and LPDDR5-6400 support on Agilex7 M-Series devices, delivering higher memory bandwidth for demanding AI, networking, and embedded applications. Together with new LPDDR5 support in Agilex 3 devices and existing DDR5 and LPDDR5 support in Agilex 5 devices, these capabilities help customers optimize performance, power, board space, and long-term component availability across the Agilex portfolio. The release also adds documented LPDDR5X device compatibility in LPDDR5-compatible mode for supported Agilex 5 and Agilex 3 devices. LPDDR5X compatibility gives customers additional qualified memory sourcing options, helping to improve supply chain optionality without requiring hardware redesigns by maintaining compatibility with existing LPDDR5 implementations. "Today's AI and intelligent edge applications demand more memory bandwidth and greater design flexibility," said Mike Fitton, vice president of product and corporate marketing at Altera. "As the only FPGA solutions provider offering DDR5 memory support across its portfolio, Altera gives customers unparalleled flexibility to optimize memory architectures for AI, networking, and embedded applications. By expanding DDR5 support across the Agilex portfolio, we're helping customers accelerate innovation while maximizing performance, power efficiency, and long-term design flexibility." The memory enhancements reflect Altera's continued investment in advancing the Agilex platform long after production release. Through ongoing software, IP and documentation updates, customers can take advantage of new capabilities while preserving their existing hardware investments to achieve: * Higher performance with DDR5 and LPDDR5 support up to 6400 MT/s, delivering up to 204.8 GB/s of aggregate memory bandwidth in supported Agilex 7 M-Series configurations. * Greater design flexibility through broader support for DDR5, LPDDR5 and LPDDR5X-compatible memory devices. * Improved supply resilience through expanded qualified memory options that simplify component sourcing and lifecycle planning. * Investment protection through software and IP upgrades that preserve existing Agilex hardware and Quartus development flows. Availability Available today, Quartus Prime Pro Edition Software version 26.1.1 expands support for DDR5-6400, LPDDR5-6400, and LPDDR5X-compatible devices across the Agilex portfolio. Developers can download the latest Quartus release to take advantage of these new memory capabilities. About Altera Altera is the industry's largest pure-play FPGA solutions provider, with an exclusive focus on delivering FPGA innovations to the broad market. The company provides a comprehensive portfolio of programmable hardware, software, and development tools that empower designers of electronic systems to innovate, differentiate, and execute with greater speed and efficiency. With industry-leading FPGAs, SoCs, and design solutions, Altera enables customers to achieve faster time-to-market, greater flexibility, and optimized performance across a wide range of applications, spanning physical AI, industrial automation, audio/video, robotics, aerospace, defense, data centers, telecommunications, and more. For more information, visit www.altera.com. Jensen Huang believes NVIDIA's chips are becoming much more than expensive pieces of hardware. As... As hybrid cognition deepens, the boundary between biological and artificial embodiment will begin to blur... The Department of Energy today announced a plan to create a new class of open-weight... The MLB trade deadline may have passed, but we're still seeing big moves in the... Prior to the June International Supercomputing Conference, ISC High Performance 2026, in Hamburg, Germany, Sean... Over the past several days, a steady stream of Genesis Mission announcements has arrived from...
Compute & density boosted for next-generation RF systems. The engineering sample of Altera's latest wideband SoC FPGAs is now available, delivering a significant forty percent increase in compute capability to power next-generation aerospace and defense RF systems By Abi Wylie / 12 Jun 2026 Altera Corporation has announced the engineering sample availability of its next-generation Agilex 9 Direct RF-Series SoC FPGAs at the International Microwave Symposium. The latest addition to the company's portfolio is designed to meet growing performance, integration, and adaptability demands in aerospace, defense, and advanced communications systems. By delivering a 40% increase in compute capability per square millimeter, the technology allows engineers to process and analyze RF signals closer to the edge while adapting to changing mission requirements within tight size, weight, power, and latency constraints. The architecture integrates high-speed data converters, programmable logic, and processing elements into a single package. Compared to the previous generation, the new device provides 45% greater logic and DSP density alongside support for DDR5 and LPDDR5 memory technologies. Featuring integrated 64Gsps wideband RF with higher compute and memory resources, this programmable solution eliminates the need for multi-chip designs and enables advanced beamforming for radar and data cube processing. The highly integrated platform supports high-bandwidth signal capture and generation, allowing users to scale performance while maintaining long-term design flexibility. Accelerate defense modernization through strategic sourcing. Discover cutting-edge solutions from leading global suppliers SUPPLIER SPOTLIGHT "Across aerospace, defense, and advanced communications, our customers are being asked to handle more data and operate within tighter constraints," said John Sotir, General Manager of Altera's Aerospace, Defense and Government business unit. "With our latest Agilex 9 Direct RF device, we're helping them meet those challenges by bringing together high-performance compute, memory, and RF capabilities into a single, highly integrated platform." Ian Dunn, CTO at Spectrum Control, an Altera board partner, stated, "As RF systems become more complex and bandwidth demands continue to grow, integration and performance at the system level are critical. Altera's newest Agilex 9 Direct RF-Series SoC FPGA enables us to simplify system architectures while delivering the high-performance signal processing our customers require. The combination of integrated RF, compute, and memory helps us accelerate development and bring more capable solutions to market faster."
Altera introduces next-generation Agilex 9 Direct RF-Series SoC FPGA to power the future of high performance RF systems. June 9, 2026 At IMS2026, Altera Corporation announced engineering sample availability of its next-generation wideband Agilex(R) 9 Direct RF-Series SoC FPGAs. Designed to meet the growing demands for performance, integration, and adaptability in aerospace, defense, and advanced communications systems, the latest addition to Altera's Direct RF portfolio delivers a 40% increase in compute capability per square millimeter and 45 percent greater logic and DSP density compared to the previous generation. As next-generation RF systems grow more complex, engineers face increasing pressure to process wider bandwidths, respond in real time, and deliver greater capabilities within tight size, weight, power, and latency constraints. Altera's Agilex(R) 9 Direct RF-Series SoC FPGAs address these challenges by enabling developers to process and analyze RF signals closer to the edge while adapting to evolving mission requirements. Related resources. Agilex 9 Direct RF-Series SoC FPGAs deliver a tightly integrated architecture that combines high-speed data converters, programmable logic, and processing elements into a single package. This enables developers building next-generation wideband RF systems to reduce complexity, manage power, and meet real-time performance demands where latency and responsiveness are critical. "Across aerospace, defense, and advanced communications, our customers are being asked to handle more data and operate within tighter constraints," said John Sotir, GM of Altera's Aerospace, Defense and Government business unit. "With our latest Agilex 9 Direct RF device, we're helping them meet those challenges by bringing together high-performance compute, memory, and RF capabilities into a single, highly integrated platform." Building on Altera's proven Direct RF portfolio, the new Agilex(R) 9 device delivers 45 percent greater logic and DSP density compared to the previous generation, along with support for next-generation DDR5 and LPDDR5 memory technologies. With integrated RF, compute, and memory resources, the programmable solution eliminates the need for multi-chip designs while enabling more advanced beamforming for radar and data cube processing. The highly integrated RF platform supports high-bandwidth signal capture and generation, allowing customers to scale performance while maintaining the flexibility to evolve their designs over time. Ian Dunn, CTO at Spectrum Control stated, "As RF systems become more complex and bandwidth demands continue to grow, integration and performance at the system level are critical. Altera's newest Agilex 9 Direct RF-Series SoC FPGA enables us to simplify system architectures while delivering the high-performance signal processing our customers require. The combination of integrated RF, compute, and memory helps us accelerate development and bring more capable solutions to market faster." Availability Engineering samples of the Agilex 9 Direct RF-Series SoC FPGA AGRW039 device are available today, with production silicon and development kits scheduled for availability in Q3 2026. For more information, visit Altera's Agilex 9 Direct RF-Series product page or contact your local Altera representative.
Altera Corporation has announced engineering sample availability of its Agilex 9 Direct RF-Series SoC FPGAs, unveiled at the International Microwave Symposium. The devices offer a 40% increase in compute capability per square millimetre and are designed for aerospace, defence and advanced communications systems. The new FPGAs integrate high-speed data converters, programmable logic and processing elements into a single package, delivering 45% greater logic and DSP density than the previous generation. They feature integrated 64Gsps wideband RF and support DDR5 and LPDDR5 memory technologies, eliminating the need for multi-chip designs. Engineering samples are available now, with production silicon and development kits scheduled for Q3 2026. The platform enables developers to process RF signals closer to the edge whilst meeting real-time performance demands.
Altera expands Agilex 9 FPGA ecosystem for defense applications. Altera Corporation, a provider of field-programmable gate array (FPGA) solutions, has announced new collaborations with Mercury Systems (NASDAQ: MRCY) and VadaTech aimed at expanding the ecosystem for its Agilex 9 Direct RF Series FPGAs. The initiative is designed to support the development of next-generation defense platforms through commercial off-the-shelf (COTS) solutions based on open architecture standards. The partnerships focus on combining Altera's Agilex 9 medium-band Direct RF FPGAs with industry-standard platforms, including SOSA-aligned OpenVPX systems. According to the companies, the approach is intended to help defense customers reduce integration complexity, accelerate deployment timelines, and enhance flexibility for software-defined radio frequency (RF) applications. As defense systems increasingly require real-time processing of large volumes of RF data, demand is growing for hardware platforms capable of delivering higher performance while reducing size, weight, power, and cost (SWaP). Altera said its Agilex 9 Direct RF Series FPGAs address these requirements by integrating RF functionality, computing resources, and high-speed transceivers within a single programmable architecture. The company noted that the medium-band Direct RF technology provides a balance of bandwidth, power efficiency, and processing performance suited for a range of defense applications, including adaptive radar systems, cognitive electronic warfare, and secure software-defined communications. Through the expanded ecosystem, customers will have access to field-proven platforms designed to improve interoperability and adaptability while supporting evolving mission requirements. The use of open architectures is also expected to facilitate system integration and reduce development risks for defense contractors and government agencies. Craig Goodwin, Senior Director of Mercury's Mixed Signal line of business, said the integration of medium-band converters into a high-performance FPGA enables significant SWaP advantages for edge-based processing applications. He noted that Altera's hardware and software development tools helped accelerate product evaluation and solution design. According to Goodwin, Mercury selected the Agilex 9 medium-band Direct RF FPGA because of its data conversion capabilities and processing resources, which he said can provide up to a tenfold SWaP advantage compared with alternative FPGA solutions for certain RF applications. VadaTech CEO Saeed Karamooz emphasized the benefits of standards-based VPX solutions, stating that Agilex 9 Direct RF Series FPGAs support seamless integration within larger defense system architectures while helping customers deploy advanced RF capabilities more quickly. John Sotir, General Manager of Altera's Military, Aerospace, and Government business unit, said modern defense platforms must process larger volumes of data across wider bandwidths while maintaining flexibility. He added that the collaborations with Mercury Systems and VadaTech reflect Altera's ongoing efforts to advance Direct RF technology and support more agile, scalable, and software-defined defense systems.