Full-Time

ML Compiler Software Engineering Technical Lead

Posted on 1/20/2025

d-Matrix

d-Matrix

201-500 employees

AI compute platform for datacenters

Enterprise Software
AI & Machine Learning

Expert

Santa Clara, CA, USA

Hybrid position requiring onsite presence in Santa Clara, CA for 3 days per week.

Category
Backend Engineering
Embedded Engineering
Software Engineering
Required Skills
Pytorch
SCRUM
Natural Language Processing (NLP)
Requirements
  • BS / MS Preferred in Computer Science or equivalent with 10+ years in ML Compiler.
  • Experience establishing, growing and/or developing engineering teams (and software teams in particular).
  • Experience with leading agile development methods is preferable including coordinating scrums, managing sprints and project task tracking with Kanban boards or similar.
  • Experience running code reviews, bug tracking meetings, familiarity and experience with CI/CD flows.
  • Managing interdependencies with other teams in order to meet milestones and target levels of performance.
  • Excellent documentation and presentation skills.
Responsibilities
  • Driving the design and implementation of the MLIR-based compiler framework.
  • Overseeing the development of the compiler that partitions and maps large-scale NLP models to a scalable, multi-chiplet, parallel processing architecture.
  • Coordinating the scheduling of parallel tasks onto the processors, data movements and inter-processor synchronization.
  • Supporting a split offline/online mapping process with just-in-time mapping to chiplets, processors and DDR memory channels.
  • Collaborating with the HW and SW architecture team, the Pytorch front-end pre-processing team, the data science numerics team, AI kernel team, SW test group, the benchmark group and the teams developing the various simulator and emulation platforms.
Desired Qualifications
  • Experience in the TVM, Glow or preferably, the MLIR project.
  • Familiarity with the LLVM project.
  • Experience mapping graph operations to many-core processors (or spatial fabrics).
  • Understanding of the trade-offs made by processor architects when implementing accelerators for DNNs, DCNNs, transformer models and attention mechanisms.

d-Matrix focuses on improving the efficiency of AI computing for large datacenter customers. The main product is the digital in-memory compute (DIMC) engine, which combines computing capabilities directly within programmable memory. This design helps reduce power consumption and enhances data processing speed while ensuring accuracy. d-Matrix differentiates itself from competitors by offering a modular and scalable approach, utilizing low-power chiplets that can be tailored for different applications. The goal of d-Matrix is to provide high-performance, energy-efficient AI inference solutions to large-scale datacenter operators.

Company Stage

Series B

Total Funding

$149.8M

Headquarters

Santa Clara, California

Founded

2019

Growth & Insights
Headcount

6 month growth

2%

1 year growth

0%

2 year growth

9%
Simplify Jobs

Simplify's Take

What believers are saying

  • Growing demand for energy-efficient AI solutions boosts d-Matrix's low-power chiplets appeal.
  • Partnerships with companies like Microsoft could lead to strategic alliances.
  • Increasing adoption of modular AI hardware in data centers benefits d-Matrix's offerings.

What critics are saying

  • Competition from Nvidia, AMD, and Intel may pressure d-Matrix's market share.
  • Complex AI chip design could lead to delays or increased production costs.
  • Rapid AI innovation may render d-Matrix's technology obsolete if not updated.

What makes d-Matrix unique

  • d-Matrix's DIMC engine integrates compute into memory, enhancing efficiency and accuracy.
  • The company offers scalable AI solutions through modular, low-power chiplets.
  • d-Matrix focuses on brain-inspired AI compute engines for diverse inferencing workloads.

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Benefits

Hybrid Work Options