SoC/ASIC Design Verification Engineer

Key Responsibilities:

• Verify ASIC/SoC functionality, performance, security, and power throughout the full chip design life cycle, from test plan definition to sign-off
• Build high quality verification environments at the chip/top and block levels following engineering best practices
• Write thorough verification documentation including test plans
• Diagnose, debug, and resolve regression failures and other errors
• Achieve coverage closure
• Ensure design functionality while upholding stringent timelines in collaboration with architecture, design, software, system, and silicon validation teams as well as engineering program managers

What We’re Looking For:

• Bachelor’s degree in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
• 4 years of experience with simulation-based verification methodologies and languages such as UVM and SystemVerilog or formal verification-based techniques including industry standard tools
• Experience developing and maintaining testbenches, test cases, and verification environments for simulation-based verification or formal verification environments

Preferred Qualifications (not required):

• Master’s or PhD in Electrical Engineering or Computer Science, or a related technical field or equivalent experience
• Knowledge of security ASICs or accelerators (e.g. cryptography accelerators or GPUs)
• Knowledge of computer architecture and memory subsystem architectures
• Experience verifying low power designs
• Experience with scripting languages such as Python

Why Join Us?

• Your work will directly contribute to the development of cutting-edge security solutions, protecting critical systems in industrial and IoT environments
• As a seed-stage startup, this role offers significant opportunities for learning and career growth
• Join a close-knit, innovative team where you can learn, grow, and contribute to building something meaningful in the security space