Principal Lab Validation Engineer

As an Astera Labs Principal Lab Validation Engineer, you will take a direct hands-on role to find the root cause of any customer quality concerns and develop corrective actions.  You will:

• Work at the system level and PHY electrical level to characterize and isolate the root cause.
• Modify device firmware to test out engineering theories and potential fixes or production screens.
• Work at ATE lab to experiment and validate potential screens.
• Participate in New Product Development process to ensure readiness for customer returns before products are launched. Collaborating with the development of evaluation hardware (boards and sockets, including FA friendly sockets) and scripts.
• Drive physical failure analysis to isolate and image defects.

Basic qualifications:

• Minimum of a Bachelor’s in Electrical Engineering while a Master’s degree is preferred. 
• Minimum of 10 years’ hands-on mixed high-speed lab experience working with equipment such as protocol analyzers, BERT, real-time scopes, sampling scopes and VNA.
• C (not ++)

Preferred experience (ideal candidate has some of this, but OJT is also possible):

• Python
• Hands-on experience with data center-quality servers
• Experience with DDR controllers, DIMMs, and/or DRAM
• Experience with chip-level security and RAS features
• Experience with CXL
• ATE (Automated Test Equipment) Advantest V93K
• Physical Failure Analysis.
• Signal and Power Integrity
• High speed communication protocols: PCIe, Ethernet, DDR, CXL, PAM4
• Knowledge of basic SerDes blocks and components such as PLL, DFE, CTLE, VGA, and DDR.

Based in Santa Clara, this position requires an in-person presence, offering a unique opportunity to impact our global operations directly.