Newgrad ASIC Verification Engineer @ Autonomous Driving Technology Leader
Posted on 7/19/2023
INACTIVE
Recogni

51-200 employees

Realtime object recognition
Locations
San Jose, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Desired Skills
Python
Verilog
CategoriesNew
Electrical Engineering
Hardware Engineering
Requirements
  • Master's or higher degree in Computer Engineering, Electrical Engineering, or similar field
  • Strong knowledge of C/C++, Verilog, and System Verilog
  • Strong knowledge and/or coursework in computer architecture, Digital design, and VLSI
  • Exposure with design and verification tools (Synthesis/ Simulation/ Waveform)
  • Knowledge of x86/ARM/RISC-V computer architectures, memory hierarchy, cache coherency, virtual memory, multicore CPU operation
  • Self-starter and highly-motivated to work in a dynamic start-up environment
Responsibilities
  • Ensure the pre-silicon correctness and quality of a multi-million gate ASIC that integrates computational accelerators and 3rd-party SoC IP blocks
  • SoC/Subsystem verification of embedded CPUs such as ARM/RISC-V and interconnect subsystem (including C and assembly diag validation)
  • Develop the block-level, sub-system and full-chip verification environment and tests to implement test plans
  • Work closely with design and architecture teams to understand the functional and performance goals of the design; and work together to make the design-under-test work under all specified circumstances
  • Triage and debug functional and performance issues with the design-under-test
  • Handle bug tracking and coverage convergence
  • Perform diagnostic and post-silicon validation tests in the lab
Desired Qualifications
  • Knowledge of and/or experience with UVM and Python
  • Familiarity with AMBA/APB/AXI Protocol
  • Internship or project work in computer architecture, logic design, or verification
  • Knowledge of and/or experience with AI/ML accelerators
  • Knowledge of and/or ASIC or SOC utilizing ARM cores