Senior Principal Engineer

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

Senior Principal Engineer, Systems Design/Architecture Engineering

About the Role:

The ADI Industrial Architecture Team is seeking an experienced Senior Principal Engineer, Systems Design/Architecture Engineering with mixed signal and RF CMOS IC design and architecture experience. The candidate will be a key member of an advanced architecture team and drive an industry-leading high-performance Industrial portfolio into new and more highly integrated market segments. The candidate will have the opportunity to develop system level designs incorporating high-performance and high-frequency RF, data converter, SERDES, DSP and PLL subsystems. A demonstrated track record of driving industry-leading performance and innovation, as manifested through patents, peer-reviewed publications and/or industry-leading product leadership and definition, is required. The ideal candidate is a self-motivated individual and with strong technical, analytical and communication skills. The role will involve significant collaboration with customers, partners and internal centers-of-excellence.

Key Responsibilities:

• Lead the definition and architecture of multi-GHz digital communication products for test and instrumentation systems, establishing signal chain requirements, subsystem partitioning, signal processing, key interfaces, performance/power targets and process nodes.
• Lead detailed analysis for RF, converter, clocking and synchronization sub-systems, digital features, and calibrations/algorithms driven by application requirements. Establish, document, and maintain clear and traceable product and system specifications to the silicon development team and to our customers through collaborative means such as Jama.
• Lead the development of behavioral system modeling infrastructure for mixed-mode simulation and quantitative architecture analysis of IPE devices.
• Lead architecture for clock synthesis and distribution for IPE devices.
• Lead architecture reviews for strategic customer and market opportunities, ensuring proposed solutions are technically credible, differentiated, manufacturable, and aligned with ADI’s portfolio strategy and customer use-cases. Communicate architecture alternatives, trade-offs, recommendations, and risks to engineering teams and senior leadership.
• Engage with key customers, ecosystem partners, and standards groups to identify market trends, customer requirements and system economics, and translate those insights into system architectures, product requirements, and technology-roadmap recommendations.
• Partner with the marketing, applications and FAE teams to identify customer pain-points, competitive threats, adoption barriers, and product ease-of-use. Synthesize findings into actionable HW or SW requirements for current and future products.
• Identify and lead greenfield market opportunities, translating emerging customer needs and mega-technology trends into differentiated products and platforms. Create and capture value for ADI through first-mover advantages versus competition leveraging ADI’s diverse technologies and IP.
• Identify cross-business-unit product planning for solutions that require multiple ADI technologies where heterogeneous integration and advanced packaging are key to product differentiation.
• Coach (and manage) system architects to strengthen the capabilities and the expansion of the system engineering team in various geographies.

Qualifications:

• BSEE required, MSEE preferred.
• 20+ years of experience in system applications engineering system design/architecture engineering, and design engineering of high-performance RF and mixed-signal IC products and systems.
• Expertise in SERDES, RF CMOS, PLL, or data converter design.
• Experience with FinFET or fine-line planar analog CMOS process technologies and tradeoffs.
• Proficiency in software-defined CMOS communications or radar system design.
• Knowledge of digitally-assisted high-speed analog design.
• Excellent presentation and writing/communication skills.

Preferred Skills:

• Leadership experience in broadband communications subsystem projects.
• Strong understanding of multi-GHz digital communications.
• Proven track record in defining and architecting high-performance communications products incorporating  RF ADCs, DACs, PLLs and SERDES.
• Experience in specifying data converters for wideband digital communication systems.
• Ability to manage multi-channel synchronization and crosstalk effectively.

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For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

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Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $184,030 to $266,485.

• Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

• This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

• This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.