Full-Time
Physical Design Engineer: Die-to-Die Interface
Rtl to Gdsii
Tenstorrent
1,001-5,000 employees
High-performance AI computing hardware and software
Compensation Overview
$100k - $500k/yr
Remote in USA
Remote
Bachelor's, Master's
 Hardware Engineering (1) |
|---|
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- Lead Die-to-Die (D2D) physical implementation and closure, taking high-speed D2D PHYs/controllers from netlist to tapeout.
- Own the full PD flow (RTL-to-GDSII): synthesis, floorplanning, place-and-route, CTS, optimization, and sign-off.
- Drive timing and verification, including full STA (setup/hold), signal integrity analysis (crosstalk, IR drop), and achieving sign-off quality DRC/LVS.
- Improve and maintain physical design methodologies, flows, and automation scripts (Tcl, Python), with specific focus on D2D routing, power grid design, and timing closure.
- Partner closely with full-chip/chiplet teams to meet all tapeout requirements and with the analog design team to resolve interface issues (LEF/LIB, constraints, integration/debug).
- Apply strong EDA tool expertise across Synopsys/Cadence/Mentor for implementation, analysis, and verification.
- Bring a solid academic foundation: B.S./M.S. in Electrical Engineering or Computer Engineering or related field.
- 5+ years at advanced nodes (7nm or below) and multiple successful tapeouts.
- Strong in full-chip implementation, comfortable owning blocks from RTL to GDSII across synthesis, floorplanning, place-and-route, CTS, and sign-off.
- Deeply familiar with high-speed interfaces (D2D, PCIe, HBM, SerDes) and the physical challenges that come with them (timing, signal integrity, power integrity).
- Detail-oriented and methodical with STA, constraints, and closure for complex, high-speed designs.
- Hands-on problem solver who enjoys collaborating across analog, digital, and full-chip teams to debug tough issues.
- Lead Die-to-Die (D2D) physical implementation and closure, taking high-speed D2D PHYs/controllers from netlist to tapeout.
- Own the full PD flow (RTL-to-GDSII): synthesis, floorplanning, P&R, CTS, optimization, and sign-off.
- Drive timing and verification, including full STA (setup/hold), SI analysis (crosstalk, IR drop), and achieving sign-off quality DRC/LVS.
- Improve and maintain physical design methodologies, flows, and automation scripts (Tcl, Python), with specific focus on D2D routing, power grid design, and timing closure.
- Partner closely with full-chip/chiplet teams to meet all tapeout requirements and with the analog design team to resolve interface issues (LEF/LIB, constraints, integration/debug).
- Apply strong EDA tool expertise across Synopsys/Cadence/Mentor for implementation, analysis, and verification.
Tenstorrent designs high-performance AI computing systems that combine specialized hardware with a software stack. Its products include AI-focused computers built with custom ASICs and RISC-V cores, plus neural network compilers that map models efficiently onto the hardware. The company differentiates itself by offering an end-to-end hardware-and-software platform optimized for AI workloads across data centers and edge environments. Its goal is to provide versatile, high-performance systems and software that help clients train, deploy, and run large-scale AI models more efficiently.
Company Size
1,001-5,000
Company Stage
Late Stage VC
Total Funding
$2.3B
Headquarters
Toronto, Canada
Founded
2016
Get referred to Tenstorrent
See people who can refer or advise you
Simplify's Take
What believers are saying
- June 30, 2026 Japan deployments exceeded 120 Galaxy systems for ai&.
- August 5, 2026 Tenstorrent joined Google, SK hynix, and SanDisk on HBF.
- July 30, 2026 Stealthium partnership adds runtime observability for regulated enterprise deployments.
What critics are saying
- Qualcomm discussed buying Tenstorrent for $8 billion to $10 billion on June 15, 2026.
- December 9, 2025 layoffs cut 80 Toronto jobs, exposing execution pressure.
- Nvidia and AMD can crush Tenstorrent if Blackhole superclusters lose benchmark leadership.
What makes Tenstorrent unique
- Jim Keller anchors Tenstorrent’s chip architecture credibility across Apple, AMD, Tesla.
- June 30, 2026 TT-Ascalon S extends RISC-V IP from CPUs to agentic AI.
- Tenstorrent’s open Ethernet-based Networked AI stack integrates compute, memory, and networking.
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Benefits
Hybrid Work Options
Growth & Insights and Company News
6 month growth
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↑ 3%2 year growth
↑ 3%SanDisk and SK hynix release first OCP specification for High Bandwidth Flash for AI Memory wall. August 5, 2026 As the global artificial intelligence economy shifts rapidly from model training to large-scale inference deployment, the semiconductor industry faces an acute physical challenge known as the memory wall. Modern large language models (LLMs) demand immense bandwidth positioned close to compute cores to process tokens efficiently. However, while High Bandwidth Memory (HBM) offers extraordinary speed, its capacity limitations and high costs create severe economic barriers for hyperscale AI deployment. Conversely, conventional NVMe Solid State Drives (SSDs) deliver massive storage density but suffer from throughput bottlenecks that stall high-speed inference processing. To eliminate this memory tier gap, flash memory pioneer SanDisk Corporation and memory leader SK hynix Inc. announced the release of the first official High Bandwidth Flash (HBF(TM) technical specification through the Open Compute Project (OCP). Published six months after the OCP HBF workstream was established in February, the open specification establishes a technical framework for integrating high-density 3D NAND flash directly into near-compute memory hierarchies. Hyperscale AI giant Google and AI processor innovator Tenstorrent joined the alliance as core consortium members, validating the specification against real-world data center workloads. Discover more Social Sciences Engineering & Technology Agriculture & Forestry A Universal blueprint for High Bandwidth Flash. The OCP HBF specification provides chip designers and data center operators with an open framework to integrate HBF alongside HBM and conventional DRAM. By establishing electrical, physical, and protocol guidelines, the alliance enables AI accelerator designers to build flexible systems that increase near-compute memory capacity while lowering total cost of ownership (TCO). Machine Learning & Artificial Intelligence Key technical highlights of the open OCP HBF specification include: UCIe Interconnect Standardization: Utilizes the Universal Chiplet Interconnect Express (UCIe) interface, allowing HBF modules to connect seamlessly with GPUs, CPUs, and custom ASICs. Massive Near-Compute Density: Defines 8-layer and 16-layer 3D NAND stacking configurations delivering up to 512GB of capacity per stack - providing up to 16x the capacity of HBM stacks at lower costs. Multi-Grade Bandwidth Performance: Establishes three performance tiers delivering data throughput from 0.4 TB/s up to 3.0 TB/s, bringing flash storage into near-memory performance thresholds. Open Ecosystem Alignment: Published under the Open Compute Project framework to position HBF as the de facto standard across data centers, preventing vendor lock-in. "AI inference is creating a new set of memory requirements, and HBF technology is designed to meet that moment," stated Alper Ilkbahar, Chief Technology Officer at SanDisk. Engineering & Technology Impact on the semiconductor industry. The release of the HBF specification by SanDisk, SK hynix, Google, and Tenstorrent marks a major structural evolution across the Semiconductors sector: 1. Redefining the Global AI Memory Hierarchy Historically, the memory hierarchy was divided between volatile DRAM/HBM and non-volatile NAND flash drives. The standardization of HBF establishes Tiered Near-Compute Storage. Positioning 3D NAND within a high-speed UCIe interconnect envelope creates an intermediate layer that absorbs massive LLM parameter weights, reducing expensive HBM capacity demands while eliminating PCIe storage bus bottlenecks. 2. Accelerating UCIe Chiplet Ecosystem Adoption Integrating HBF technology via UCIe host interfaces provides a commercial catalyst for advanced packaging and chiplet integration. As memory makers stack 375-layer 4D NAND dies alongside logic dies, the supply chain will see increased capital expenditure toward advanced silicon interposers and 3D chiplet packaging. Overall effects on businesses operating in the sector. For hyperscale cloud providers, AI silicon startups, and enterprise OEMs, the standardized HBF platform delivers direct strategic benefits: Lowering Capital Expenditure for AI Deployments: Integrating lower-cost 3D NAND into near-compute tiers allows cloud providers like Google to serve multi-billion parameter LLMs at lower capital costs per query. Leveling the Playing Field for Startups: Open UCIe-compliant HBF specifications enable non-traditional chipmakers (such as Tenstorrent) to design high-performance AI inference accelerators without building custom memory controllers. Creating New Revenue Streams for Foundries: The emergence of HBF provides NAND flash manufacturers with a high-margin product category, reducing exposure to consumer SSD price cycles. Conclusion. The release of the first OCP High Bandwidth Flash specification by SanDisk and SK hynix represents a defining moment for semiconductor architecture. By combining high-density 3D NAND flash with near-memory bandwidth and open UCIe chiplet connectivity, these industry leaders are dismantling the AI memory wall. For the semiconductor industry, this milestone confirms that the future of scalable AI computing belongs to open, tiered memory architectures capable of delivering massive intelligence at scale.
Stealthium and Tenstorrent partner to deliver runtime observability for AI infrastructure. JUL 2026 By Stealthium Team Stealthium's runtime observability platform integrates with Tenstorrent's open AI compute platform to provide visibility into AI workloads. SAN FRANCISCO and SANTA CLARA, Calif. - July 30, 2026 - Stealthium, the runtime observability and security company for AI infrastructure, and Tenstorrent, a leader in AI compute and high-performance RISC-V CPUs, today announced a partnership to bring runtime observability and security to AI workloads running on Tenstorrent systems. Through this partnership, customers running AI workloads on Tenstorrent hardware will be able to monitor accelerator activity, detect runtime anomalies, and gain visibility into workload execution. Stealthium's platform helps operators understand how AI infrastructure is being utilized while identifying potential security and operational issues before they affect production environments, and will be available as an integrated option for Tenstorrent deployments. Soon to be demonstrated on Tenstorrent's customer cloud environment, it will provide operators and teams with runtime visibility directly on the AI accelerators. Stealthium and Tenstorrent share in a vision to bring customers observable, secure, and controlled AI accelerated compute. As organizations deploy increasingly complex AI workloads, particularly in regulated and multi-tenant environments across financial services, telecommunications, and energy, runtime assurance and security are becoming increasingly important. Together, Tenstorrent and Stealthium enable customers to monitor workload isolation, identify inefficient compute utilization, detect abnormal runtime behavior, and integrate telemetry with existing security and infrastructure monitoring platforms. Built on an open, full-stack architecture, Tenstorrent's platform enables ecosystem partners like Stealthium to extend functionality throughout the AI software stack, giving customers greater visibility and flexibility for their deployments. "AI is only as secure and trustworthy as the layer it runs on, yet for many that layer is currently invisible and indefensible. Stealthium exists to make AI accelerated compute observable, secure, and controlled. Tenstorrent is building exactly the kind of open, full-stack platform where that belongs from day one. Together we are offering customers an AI acceleration foundation they can see, verify, and trust as they scale." - Ahmed Shosha, CEO & Founder, Stealthium "As enterprises and cloud providers move toward sovereign and private AI deployments, they need infrastructure that delivers high-performance compute and operational trust. Tenstorrent's open, full-stack AI platform gives customers greater control over their deployments, while Stealthium extends visibility and security at the runtime layer. Together, we can help customers build enterprise-grade AI infrastructure that is more secure, more transparent, and ready for production at scale." - Amr Elashmawi, Vice President of Strategy & Business Development, Tenstorrent About stealthium. Stealthium is the runtime observability and security company for AI infrastructure, on a mission to make AI Accelerated Compute observable, secure, and controlled everywhere, across any accelerator, any cloud, and any scale. Its platform gives operators and tenants visibility and security at the layer where AI workloads execute. Built for organizations running AI infrastructure at scale, Stealthium is brought to you by security and infrastructure leaders who have done this before: alumni of global leaders including Mandiant, CrowdStrike, Microsoft, and Canonical. Learn more at stealthium.io. About Tenstorrent. Tenstorrent is an AI compute company led by CEO Jim Keller - architect of Apple A4/A5, AMD Zen, and Tesla's Full Self-Driving chip. The company builds RISC-V-based AI processors and systems for developers, enterprises, and sovereign infrastructure worldwide. In addition to servers and workstations, Tenstorrent licenses its TT-Ascalon RISC-V CPU and Tensix AI cores to chip designers including Samsung and LG. Backed by Bezos Expeditions, Samsung, LG Electronics, Hyundai Motor Group, Fidelity, and others, Tenstorrent has raised over $1B+ and operates from Santa Clara, Austin, Toronto, Belgrade, Tokyo, and Bangalore. Media contacts. The official announcement is also available on GlobeNewswire.
News & articles. At ConnectWeb Connectweb has a team of editors and researchers collating the most relevant information to you and your industry. All Directories' publications and sites provide a wealth of information for research or marketing, and are used by public and corporate libraries, educational institutions, government departments, corporations and SMEs across the country. You are here: Home News Access the latest company news and announcements distributed through Medianet. Information Technology 30/06/2026 16:47 Tenstorrent sets new performance records, launches TT- Ascalon S, and expands Across Japan. Tenstorrent At TT-Deploy JP, Tenstorrent set new records on language and video models, launched TT-Ascalon S RISC-V CPU IP for agentic AI, and joins ai&'s sovereign heterogenous inference platform with Tenstorrent Galaxy(TM) superclusters, a general-purpose system that can drop in beside GPUs or stands alone. TOKYO, JP / ACCESS Newswire / June 30, 2026 / Tenstorrent, the AI compute company led by CEO Jim Keller, today at TT-Deploy JP set new performance records across language and video, launched TT-Ascalon S RISC-V CPU IP for agentic AI, and detailed its largest deployment to date, a general-purpose, heterogenous AI build in Japan. Each rests on the same foundation: a single architecture that runs major AI workloads faster than GPUs and scales from a licensable core to a Tenstorrent Galaxy(TM) supercluster over standard Ethernet. That makes Tenstorrent's Networked AI architecture a different kind of solution - open, general-purpose, flexible for heterogeneous or stand alone deployments, and backed by AI experts - that can withstand the constant change in the AI industry. New industry records from language to video Continuing to build on previous performance, Tenstorrent shared new LLM and video with lip-sync and audio benchmarks. On the latest models enterprises are deploying right now, Tenstorrent Galaxy Blackhole superclusters post: * Kimi K2.6: 900 tokens/second/user, 3x faster than GPUs * DeepSeek-R1-0528 671B: 400+ tokens/second/user, up from 350+ at TT-Deploy SF * LTX 2.3 Fast: roughly 6-second video generation at 144 frames, 1080p, with audio and lip-sync, 4x faster than GPUs Different model families, one architecture, with capacity that grows near-linearly as Galaxies are added. Tenstorrent's performance enables enterprises to scale premium inference workloads efficiently. TT-Ascalon S: Tenstorrent expands the TT-Ascalon portfolio with TT-Ascalon S suited to emerging agentic AI workloads Launching today at TT-Deploy JP, Tenstorrent announced TT-Ascalon S, a compute-dense RISC-V CPU for agentic AI. Agentic AI leans on the CPU in a new way, gated less by raw compute than by orchestration, I/O, and latency, and TT-Ascalon S is built for it: * Density: Built on the foundation of TT-Ascalon X, TT-Ascalon S is purpose built for a footprint ~50% the size, delivering ~140% performance per mm[2]. * Efficiency: A compact, power-efficient design for high-throughput execution layers. * Latency: Ascalon S is tuned for the mixed, branch-heavy, tool-connected execution patterns typical of agent runtimes, helping enable more predictable execution. In addition to agentic AI, TT-Ascalon S is applicable to high-efficiency servers, networking and storage SoCs, and data-center edge deployments. As licensable RISC-V IP, it enables customers to extend the same architectural foundation into custom silicon designs. Built to drop in, or stand alone Connecting the accelerators and the CPU alike is Tenstorrent's Networked AI. The architecture unifies compute, memory, and networking over standard Ethernet, with an open-source software stack. Tenstorrent Galaxies and superclusters stand alone or drop into an existing GPU fleet without replacing existing infrastructure. Customers can add capacity without betting on a single model, workload, or vendor; the systems keep performing as models change; and the infrastructure stays in the customer's hands. For the enterprises and nations building next-gen private AI infrastructure, that independence and flexibility is key. "We built one architecture that runs everything, drops in next to whatever you already own, and scales from a licensable core to a supercluster. That's what lets a company, or a country, own its AI and adapt to the only constant in AI - change. We're excited to partner so widely in Japan with key partners like ai&, Rapidus, Preferred Networks, Socionext and Turing." said Jim Keller, CEO of Tenstorrent. Running across Japan, at national scale Across Japan, Tenstorrent enables cloud service providers, data centers, and private infrastructure with everything from licensable IP to large-scale supercluster deployments. Its largest deployment to date runs with ai&, Japan's vertically integrated frontier AI platform. ai& launched its heterogeneous inference platform to expand sovereign AI in Japan. Tenstorrent Galaxies and superclusters support key inference and agentic workloads, and enables customer use cases such as: chat, RAG, vision, and post training, served entirely from within the country. They've deployed more than 120 Tenstorrent Galaxy systems representing the largest scale of sovereign AI compute in the region. "ai& is built on the conviction that the best inference infrastructure routes every workload to the silicon best suited to it. Tenstorrent's Galaxy superclusters have proven themselves on exactly the workloads our enterprise customers care about, and this deployment represents the largest sovereign AI compute footprint in Japan. We're excited for what the partnership unlocks," said David Bennett, CEO & co-founder at ai& That reach rests on a deep base in the country. Turing, the Tokyo-based autonomous-driving company, has demonstrated Tenstorrent Blackhole running inside an autonomous vehicle as a proof-of-concept. And through the national 2nm program with Rapidus, adopted by NEDO and led by LSTC, Tenstorrent contributes the RISC-V CPU chiplet. Tenstorrent Japan has operated in Tokyo since 2023, runs an AI data center in Osaka today, and is bringing up to 200 Japanese silicon engineers into its design teams. TT-Deploy JP brings the ecosystem on stage, with partners including ai&, Rapidus, Preferred Networks, Socionext and Turing, plus live demos from ai&, BOS and Turing. About Tenstorrent Tenstorrent is an AI compute company led by CEO Jim Keller - architect of Apple A4/A5, AMD Zen, and Tesla's Full Self-Driving chip. The company builds RISC-V-based AI processors and systems for developers, enterprises, and sovereign infrastructure worldwide. In addition to servers and workstations, Tenstorrent licenses its TT-Ascalon RISC-V CPU and Tensix AI cores to chip designers including Samsung and LG. Backed by Bezos Expeditions, Samsung, LG Electronics, Hyundai Motor Group, Fidelity, and others, Tenstorrent has raised over $1B+ and operates from Santa Clara, Austin, Toronto, Belgrade, Tokyo, and Bangalore. Learn more at tenstorrent.com. Media Contact * images - 71094.jpg tenstorrent sets new performance records, launches TT- Ascalon S, and expands Across Japan download. ConnectWeb. ConnectWeb is Australia's leading publisher of biographical data, directories and specialist newsletters. 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Tenstorrent has set new performance records on language and video models, launched TT-Ascalon S RISC-V CPU IP for agentic AI, and announced its largest deployment to date in Japan. The company's Blackhole superclusters achieved 900 tokens per second per user on Kimi K2.6 and generated 1080p video with audio in roughly six seconds, both significantly faster than GPUs. The newly launched TT-Ascalon S CPU is purpose-built for agentic AI workloads, delivering approximately 140% performance per square millimetre. Tenstorrent's architecture runs on standard Ethernet and can integrate with existing GPU infrastructure or operate independently. In Japan, ai& has deployed over 120 Tenstorrent Galaxy systems, representing the largest sovereign AI compute footprint in the region. Tenstorrent has raised over $1 billion from investors including Bezos Expeditions, Samsung and Fidelity.
Tenstorrent sets new performance records, launches TT- Ascalon S, and expands Across Japan. 11 hours ago At TT-Deploy JP, Tenstorrent set new records on language and video models, launched TT-Ascalon S RISC-V CPU IP for agentic AI, and joins ai&'s sovereign heterogenous inference platform with Tenstorrent Galaxy™ superclusters, a general-purpose system that can drop in beside GPUs or stands alone. TOKYO, JP / ACCESS Newswire / June 30, 2026 / Tenstorrent, the AI compute company led by CEO Jim Keller, today at TT-Deploy JP set new performance records across language and video, launched TT-Ascalon S RISC-V CPU IP for agentic AI, and detailed its largest deployment to date, a general-purpose, heterogenous AI build in Japan. Each rests on the same foundation: a single architecture that runs major AI workloads faster than GPUs and scales from a licensable core to a Tenstorrent Galaxy(TM) supercluster over standard Ethernet. That makes Tenstorrent's Networked AI architecture a different kind of solution - open, general-purpose, flexible for heterogeneous or stand alone deployments, and backed by AI experts - that can withstand the constant change in the AI industry. New industry records from language to video Continuing to build on previous performance, Tenstorrent shared new LLM and video with lip-sync and audio benchmarks. On the latest models enterprises are deploying right now, Tenstorrent Galaxy Blackhole superclusters post: * Kimi K2.6: 900 tokens/second/user, 3x faster than GPUs * DeepSeek-R1-0528 671B: 400+ tokens/second/user, up from 350+ at TT-Deploy SF * LTX 2.3 Fast: roughly 6-second video generation at 144 frames, 1080p, with audio and lip-sync, 4x faster than GPUs Different model families, one architecture, with capacity that grows near-linearly as Galaxies are added. Tenstorrent's performance enables enterprises to scale premium inference workloads efficiently. TT-Ascalon S: Tenstorrent expands the TT-Ascalon portfolio with TT-Ascalon S suited to emerging agentic AI workloads Launching today at TT-Deploy JP, Tenstorrent announced TT-Ascalon S, a compute-dense RISC-V CPU for agentic AI. Agentic AI leans on the CPU in a new way, gated less by raw compute than by orchestration, I/O, and latency, and TT-Ascalon S is built for it: * Density: Built on the foundation of TT-Ascalon X, TT-Ascalon S is purpose built for a footprint ~50% the size, delivering ~140% performance per mm[2]. * Efficiency: A compact, power-efficient design for high-throughput execution layers. * Latency: Ascalon S is tuned for the mixed, branch-heavy, tool-connected execution patterns typical of agent runtimes, helping enable more predictable execution. In addition to agentic AI, TT-Ascalon S is applicable to high-efficiency servers, networking and storage SoCs, and data-center edge deployments. As licensable RISC-V IP, it enables customers to extend the same architectural foundation into custom silicon designs. Built to drop in, or stand alone Connecting the accelerators and the CPU alike is Tenstorrent's Networked AI. The architecture unifies compute, memory, and networking over standard Ethernet, with an open-source software stack. Tenstorrent Galaxies and superclusters stand alone or drop into an existing GPU fleet without replacing existing infrastructure. Customers can add capacity without betting on a single model, workload, or vendor; the systems keep performing as models change; and the infrastructure stays in the customer's hands. For the enterprises and nations building next-gen private AI infrastructure, that independence and flexibility is key. "We built one architecture that runs everything, drops in next to whatever you already own, and scales from a licensable core to a supercluster. That's what lets a company, or a country, own its AI and adapt to the only constant in AI - change. We're excited to partner so widely in Japan with key partners like ai&, Rapidus, Preferred Networks, Socionext and Turing." said Jim Keller, CEO of Tenstorrent. Running across Japan, at national scale Across Japan, Tenstorrent enables cloud service providers, data centers, and private infrastructure with everything from licensable IP to large-scale supercluster deployments. Its largest deployment to date runs with ai&, Japan's vertically integrated frontier AI platform. ai& launched its heterogeneous inference platform to expand sovereign AI in Japan. Tenstorrent Galaxies and superclusters support key inference and agentic workloads, and enables customer use cases such as: chat, RAG, vision, and post training, served entirely from within the country. They've deployed more than 120 Tenstorrent Galaxy systems representing the largest scale of sovereign AI compute in the region. "ai& is built on the conviction that the best inference infrastructure routes every workload to the silicon best suited to it. Tenstorrent's Galaxy superclusters have proven themselves on exactly the workloads our enterprise customers care about, and this deployment represents the largest sovereign AI compute footprint in Japan. We're excited for what the partnership unlocks," said David Bennett, CEO & co-founder at ai& That reach rests on a deep base in the country. Turing, the Tokyo-based autonomous-driving company, has demonstrated Tenstorrent Blackhole running inside an autonomous vehicle as a proof-of-concept. And through the national 2nm program with Rapidus, adopted by NEDO and led by LSTC, Tenstorrent contributes the RISC-V CPU chiplet. Tenstorrent Japan has operated in Tokyo since 2023, runs an AI data center in Osaka today, and is bringing up to 200 Japanese silicon engineers into its design teams. TT-Deploy JP brings the ecosystem on stage, with partners including ai&, Rapidus, Preferred Networks, Socionext and Turing, plus live demos from ai&, BOS and Turing. About Tenstorrent Tenstorrent is an AI compute company led by CEO Jim Keller - architect of Apple A4/A5, AMD Zen, and Tesla's Full Self-Driving chip. The company builds RISC-V-based AI processors and systems for developers, enterprises, and sovereign infrastructure worldwide. In addition to servers and workstations, Tenstorrent licenses its TT-Ascalon RISC-V CPU and Tensix AI cores to chip designers including Samsung and LG. Backed by Bezos Expeditions, Samsung, LG Electronics, Hyundai Motor Group, Fidelity, and others, Tenstorrent has raised over $1B+ and operates from Santa Clara, Austin, Toronto, Belgrade, Tokyo, and Bangalore. Learn more at tenstorrent.com. Media Contact