Simplify Logo

Full-Time

Principal System Validation Engineer

Confirmed live in the last 24 hours

Astera Labs

Astera Labs

201-500 employees

Semiconductor connectivity solutions for AI and cloud

Data & Analytics
Hardware
AI & Machine Learning

Compensation Overview

$180k - $260kAnnually

Senior, Expert

Santa Clara, CA, USA

Category
QA & Testing
Quality Assurance
Required Skills
Python
Requirements
  • Strong academic and technical background in electrical or computer engineering
  • Bachelor’s degree required, Master’s degree preferred
  • ≥8 years of experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications
  • Knowledge in scripting for automation of validation efforts (e.g. Python, Matlab)
  • Experience with silicon bring-up, debugging complex electrical and system performance issues, production ramp
  • Knowledgeable about high-speed SerDes protocols like Ethernet, PCIe, etc.
  • Experience working with lab equipment such as protocol analyzers, BERT, real-time scopes, sampling scopes, and VNA
  • Experience with PAM4 SerDes validation
  • Knowledge of schematic capture and PCB layout tools from Cadence, Altium, etc.
  • Knowledge of Signal Integrity simulation tools
  • Professional attitude with the ability to prioritize tasks, plan for meetings, work independently
  • Entrepreneurial, open-minded behavior, and customer-centric attitude
Responsibilities
  • Develop and perform system validation tests using leading-edge Data Center equipment and scalable automation platforms
  • Understand performance and functionality requirements of ICs for Data Center systems
  • Formulate a comprehensive validation plan, automate testing, design experiments, report results
  • Work directly with key customers to understand their needs and highlight Astera Labs' solutions

Astera Labs specializes in semiconductor-based connectivity solutions, including PCIe, CXL, and Ethernet technologies, designed to optimize cloud and AI infrastructure by addressing performance bottlenecks in data-centric systems. Their purpose-built products enable high-bandwidth, low-latency interconnects for compute, storage, and accelerator resources, as well as robust CXL and PCIe connectivity for GPUs, AI accelerators, and networking applications.

Company Stage

IPO

Total Funding

$739.4M

Headquarters

Santa Clara, California

Founded

2017

Growth & Insights
Headcount

6 month growth

30%

1 year growth

44%

2 year growth

351%