Full-Time

High Level Synthesis Design Engineer

Confirmed live in the last 24 hours

Celestial AI

Celestial AI

51-200 employees

Silicon photonics for high-performance computing

AI & Machine Learning
Hardware

Expert

Irvine, CA, USA + 1 more

Required Skills
Verilog
Requirements
  • 5+ years of RTL design experience (Verilog, SystemVerilog, digital microarchitecture)
  • Extensive experience coding C/C++
  • Experience with High Level Synthesis for ASICs or FPGAs
  • Knowledge of basic processor architecture
  • Experience with full ASIC design cycle (spec through bring-up) preferred
  • BS plus 7 years relevant experience. MS preferred
Responsibilities
  • Implement functionality as specified in the Celestial architecture simulator in HLS (System C/C++)
  • Negotiate changes with architects as needed to meet performance goals
  • Author detailed design documents
  • Perform power, area, and performance trade-off analysis
  • Collaborate with the DV team and review test plans to ensure bug-free designs
  • Drive coverage closure of your designs

Celestial AI has developed the Photonic Fabric™ technology platform, utilizing silicon photonics for data movement within and between chips, enabling high-performance computing solutions with differentiated single node performance and efficient scalability for multi-node and multi-model applications. The platform leverages integrated silicon photonics for data movement, providing significant performance gains for machine learning and high-performance computing applications, with a projected addressable market exceeding $70 billion in 2025.

Company Stage

Series C

Total Funding

$337.9M

Headquarters

Santa Clara, California

Founded

2020

Growth & Insights
Headcount

6 month growth

19%

1 year growth

32%

2 year growth

190%