GPU Design Verification Engineer

Job Details:

Job Description: 

As an GPU Design Verification Engineer your responsibilities will include but are not limited to:

• Performing functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements.
• Defining and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications.
• Executing verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment.
• Finding and implementing corrective measures to resolve failing tests.
• Collaborating with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
• Documenting test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintaining and improving existing functional verification infrastructure and methodology.
• Participating in the definition of verification infrastructure and related TFMs needed for functional design verification.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Bachelor’s with 1+ year of related experience or Master’s Degree
• 1+ years of experience with System Verilog, Universal Verification Methodology (UVM), and/or constraint random verification 

Preferred Qualifications:

• Bachelor’s with 4+ year of related experience or Master’s Degree with 2+ years of related experience

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research 

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Folsom

Additional Locations:

US, California, San Jose, US, Oregon, Hillsboro

Business group:

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center.  Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://jobs.intel.com/en/benefits

Annual Salary Range for jobs which could be performed in the US:

$121,050.00-$170,890.00

Salaryrangedependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.