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Full-Time

System Validation Engineer

Posted on 10/4/2023

Astera Labs

Astera Labs

201-500 employees

Semiconductor connectivity solutions for AI and cloud

Data & Analytics
Hardware
AI & Machine Learning

Compensation Overview

$80k - $120kAnnually

Junior, Mid

Santa Clara, CA, USA

Required Skills
Printed Circuit Board (PCB) Design
Altium
Python
Cadence Allegro
Linux/Unix
Requirements
  • Bachelor's degree in electrical or computer engineering
  • 3+ years experience with SoC/silicon products for Server, Storage, and/or Networking applications
  • Basic understanding of x86/ARM architecture and UEFI/Linux boot sequence
  • Experience with high-speed protocols like CXL, PCIe, NVMe, or Ethernet
  • Experience with bench automation techniques, especially using Python
  • Experience with lab equipment including protocol analyzers, in-circuit debuggers, and CPU-based tool suites
Responsibilities
  • Develop and perform system validation tests using leading-edge Data Center equipment and scalable automation platforms
  • Formulate a comprehensive validation plan
  • Automate the testing of ICs and board products in a data-centric manner
  • Design experiments to root-cause unexpected behavior
  • Report results and specification compliance in an automated fashion
  • Work with key customers directly to understand their care-abouts and highlight the unique capabilities and performance of Astera Labs’ solutions
Desired Qualifications
  • Master's degree in electrical or computer engineering
  • Experience with C or C++ for embedded FW and device drivers
  • Familiarity with CXL compliance standards and ability to follow and be involved in compliance consortiums
  • Knowledge of schematic capture and PCB layout tools from Cadence Allegro, Altium, etc.
  • Knowledge of simulation tools such as Keysight ADS, Mathworks QCD, etc. for IBIS-AMI analysis

Astera Labs specializes in semiconductor-based connectivity solutions, including PCIe, CXL, and Ethernet technologies, designed to optimize cloud and AI infrastructure by addressing performance bottlenecks in data-centric systems. Their purpose-built products enable high-bandwidth, low-latency interconnects for compute, storage, and accelerator resources, as well as robust CXL and PCIe connectivity for GPUs, AI accelerators, and networking applications.

Company Stage

IPO

Total Funding

$739.4M

Headquarters

Santa Clara, California

Founded

2017

Growth & Insights
Headcount

6 month growth

30%

1 year growth

44%

2 year growth

351%
INACTIVE