Your Role in Our Mission:

At Normal Computing, we’re developing a new thermodynamic computing paradigm to accelerate probabilistic AI workloads by embracing noise, rather than fighting it. Our work combines foundational research on the physics of computing with a mission to ship scalable, reliable silicon and systems to revolutionize AI.

As a mixed-signal design engineer at Normal, you will work closely with the silicon and hardware R&D team to develop and implement novel thermodynamic computing architectures. You will have significant ownership of the mixed-signal computational core of our architecture, as well as the analog-to-digital interface circuits that will enable the thermodynamic compute core to interface with digital systems.

Responsibilities:

• You will play a key role in the entire development process of our silicon, from idea to architecture to implementation to tape-out.

• Contribute new ideas for potential thermodynamic computing technologies and architectures.

• Implement analog and mixed-signal components in Cadence Virtuoso, potentially including analog-to-digital converters, amplifiers, memory cells, and oscillators.

• Perform layout, parasitic extraction, and optimization of Normal’s thermodynamic computing circuits.

• Participate in the tape-out, bring-up, and testing of Normal’s silicon.

What Makes You A Great Fit:

• Experience working on analog-to-digital and/or digital-to-analog converters that push the envelope in terms of performance, power consumption, accuracy, or area.

• Proficiency with VerilogA for modeling analog and mixed-signal circuits and devices, and experience leveraging those models to deliver system-level performance estimates.

• Experience in Verilog and/or SystemVerilog.

• Experience in scripting languages, including Python, Perl, and/or TCL.

• Proficiency with Cadence Virtuoso for design and layout of analog blocks.

• Understanding of design and layout techniques to minimize mismatch and parasitics while maximizing performance.

• Strong understanding of design for manufacturability, transistor mismatch, and yield.

• Excellent communication skills and the ability to work well on a small, interdisciplinary team.

What Elevates Your Application:

• Experience with mixed-signal PLL design.

• Experience with foundries & foundry aggregators to help acquire, set up, and support PDKs, set up and perform LVS and DRC flows, and tape out a completed silicon product.

• Experience selecting, sourcing, and integrating third-party IP from multiple different vendors into a silicon product.

• Familiarity with the wafer test, packaging, and chip testing process, including creating package drawings, writing test plans, and working with an external testing provider to implement testing at scale.

• Experience working at a startup.

Equal Employment Opportunity Statement

Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.

Accessibility Accommodations

Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at [email protected].

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