Full-Time

Validation Engineer – Principal

Confirmed live in the last 24 hours

d-Matrix

d-Matrix

51-200 employees

AI compute platform using in-memory computing

AI & Machine Learning
Data & Analytics
Hardware

Senior

Santa Clara, CA, USA

Requirements
  • BS/MS in Electrical/Computer Engineering
  • 10+ years of hands-on post-Si validation with at least 3-5 years as a lead/manager
  • Familiarity with high-speed serial protocol (such as PCIe Gen3/4/5) and/or high-speed external memory technology (such as LPDDR3/LPDDR4/LPDDR5 and/or high-speed I/O standards
  • Experienced with PLLs, Si bring up, and familiarity with Lab equipment (such as Oscilloscopes, pattern generator, logic analyzer etc)
  • Excellent debugging verbal and written communication skills
  • Capable of working effectively across cross-functional organizational boundaries
  • Leader with a passion for successful products and capable of driving team direction and bring up strategy
Responsibilities
  • Work on chip(s) bring up, Validation and debug of a cutting-edge interference accelerator chiplet
  • Create and execute a test bring-up and detailed validation plan as well as test automation
  • Build test scripts for host systems to test various validation aspects of high-speed interfaces such as PCIe, and/or LPDDR, and/or D2D
  • Collaborate with hardware, software, and operations team on various aspects
  • Work with the team on procuring/acquiring lab equipment

d-Matrix is developing a unique AI compute platform using in-memory computing (IMC) techniques with chiplet level scale-out interconnects, revolutionizing datacenter AI inferencing. Their innovative circuit techniques, ML tools, software, and algorithms have successfully addressed the memory-compute integration problem, enhancing AI compute efficiency.

Company Stage

Series B

Total Funding

$161.5M

Headquarters

Santa Clara, California

Founded

2019

Growth & Insights
Headcount

6 month growth

0%

1 year growth

33%

2 year growth

194%