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Full-Time

Director of Electrical Engineering

Confirmed live in the last 24 hours

Astera Labs

Astera Labs

201-500 employees

Semiconductor connectivity solutions for AI and cloud

Hardware

Compensation Overview

$190k - $260kAnnually

Expert

Santa Clara, CA, USA

Category
Electronics Design Engineering
Microelectronics Engineering
Electrical Engineering
Required Skills
Printed Circuit Board (PCB) Design
Cadence Allegro
Requirements
  • Strong academic and technical background in electrical engineering.
  • Bachelor’s in EE is required; Master’s is preferred.
  • Technical management experience
  • Minimum of 10 years’ experience in leading design team
  • Experience working in dynamic, fast-paced environment
  • Strong cross-functional collaboration
  • Strong background in high-speed board design techniques and methodologies
  • Knowledge of schematic capture and PCB layout tools
  • Working knowledge of Allegro layout tool
  • Working knowledge of power architecture
  • Understanding of signal and power integrity challenges and solutions
  • Designing systems with high-speed NRZ/PAM4 SerDes-based protocols
  • Strong experience in board bring-up and validation
  • Silicon/PCB bring-up and debug experience
  • Track record of taking products from concept to mass production
  • Experience working with contract manufacturers, pcb vendors, and other external suppliers
  • Startup experience
  • Working with off-shore CMs
  • Working with mechanical and thermal teams
  • Hardware design around FPGAs and/or MCUs
  • Experience designing PCIe/CEM cards or paddle cards/active copper cable applications
  • Designing complete high-speed channels
  • Working with silicon characterization/validation teams
  • Technical writing skills
  • Experience in “adjacent” areas such as manufacturing, quality, compliance
Responsibilities
  • Leading design team in every stage of design, from concept to mass production
  • Driving innovation within the organization by providing insightful feedback
  • Collaborating on or leading activities closely related to design
  • Direct interaction with key customers to solicit input on form factors
  • Leading a group of talented individuals in a dynamic environment
  • Being hands-on and assisting in projects based on need/experience

Astera Labs specializes in semiconductor-based connectivity solutions, including PCIe, CXL, and Ethernet technologies, designed to optimize cloud and AI infrastructure by addressing performance bottlenecks in data-centric systems. Their purpose-built products enable high-bandwidth, low-latency interconnects for compute, storage, and accelerator resources, as well as robust CXL and PCIe connectivity for GPUs, AI accelerators, and networking applications.

Company Stage

IPO

Total Funding

$739.4M

Headquarters

Santa Clara, California

Founded

2017

Growth & Insights
Headcount

6 month growth

18%

1 year growth

42%

2 year growth

117%