System Level Test Engineer – University Graduate

• Develop System Level Test (SLT) solutions for custom ASIC’s and SoC’s by specifying hardware and integration requirements, driving vendor interactions, developing software frameworks and test modules, and integrating test cases from silicon validation and system software and test teams.
• Partner with data center server and accelerator design teams to realize practical test solutions leveraging system design and test elements.
• Partner with hardware and software teams to evaluate functional device yield and performance across various operating conditions, characterize hardware/software interaction, and develop effective production screens to reduce Defective Parts per Million (DPPM).
• Integrate test software and hardware solutions with robotic chip handlers, drive bring-up of fully integrated solutions in internal and partner NPI labs, transfer all collaterals needed for High Volume Manufacturing (HVM) at Offshore Assembly and Test (OSAT) facilities, and provide ongoing HVM support.

Minimum qualifications:

• PhD in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
• Experience with hardware testing of systems based on custom ASIC’s or SoC products
• Experience with Linux/Unix, Python programming, or basic TCP/IP network configuration

Preferred qualifications:

• Experience with hardware and semiconductor testing
• Experience implementing secure ASIC/SoC manufacturing solutions (e.g., provisioning, e-fuse programming, and lifecycle management)
• Proficiency in C#, .NET Framework, C/C++, and Perl
• Knowledge of ASIC/SoC Boot process and CPU performance testing

As a System Level Test Engineer, you'll help to integrate System on Chip (SoC) technologies into High Performance Computing Products. You'll develop and automate system-level manufacturing test of ASIC’s and SoC’s to validate performance and screen out bad devices.

In this role, you will participate in all aspects of System level Test and Product Engineering activities. You will work with ASIC Architecture, Design, and Pre-silicon SoC Verification teams to define test methodologies and implement manufacturing solutions.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

• PhD in Electrical Engineering, Computer Engineering, a related technical field, or equivalent practical experience.
• Experience with hardware testing of systems based on custom ASIC’s or SoC products
• Experience with Linux/Unix, Python programming, or basic TCP/IP network configuration