Full-Time

ASIC/FPGA Research Engineer

Digital Design

University of Southern California

University of Southern California

Compensation Overview

$107.2k - $140k/yr

Arlington, VA, USA

Hybrid

Hybrid schedule; requires some days on-site in Arlington, VA.

Category
Electrical Engineering (1)
Hardware Engineering (1)
Required Skills
Verilog
Python
Git
Go
VHDL
C/C++
Linux/Unix
Requirements
  • Degree in Electrical Engineering, Computer Engineering or related field.
  • Bachelor's degree with more than 3 years of experience, or Master's degree.
  • Demonstrated success creating digital designs with Verilog or VHDL.
  • Solid understanding of computer architecture.
  • Demonstrated skills with scripting, revision control, and debugging/maintaining equipment and tools.
  • Knowledge of one or more relevant programming languages (e.g., Python, C++, Go Lang).
  • Experience with Linux.
  • Minimum Education: Bachelor's degree.
  • Minimum Experience: 5 years.
Responsibilities
  • Support research efforts by implementing technical solutions to novel research problems.
  • Work closely with senior researchers and contribute to team efforts to transform ideas into implemented solutions and prototypes.
  • Contribute to system implementation and documentation, and to publications.
  • Initiate the design, development and implementation of technology research projects.
  • Investigate the feasibility of applying scientific principles and concepts to potential inventions and products.
  • Plan and execute applied research.
  • May oversee staff and students.
Desired Qualifications
  • Experience with FPGA-based design and bring-up.
  • Experience with design verification.
  • Familiarity with agile hardware design methodologies.
  • Effective at verbal communication and giving clear explanations.
University of Southern California

University of Southern California

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