Principal Design Verification Engineer
Posted on 3/22/2024
Astera Labs

201-500 employees

Semiconductor-based connectivity solutions for cloud-scale data
Company Overview
Astera Labs stands at the forefront of semiconductor-based connectivity solutions, specializing in the optimization of accelerated computing platforms for AI applications. Their pioneering products, based on PCIe, CXL, and Ethernet technologies, address the growing demand for efficient data processing, transfer, and storage in today's data centers. With a focus on enabling intelligent data infrastructure at cloud-scale, Astera Labs is a key player in supporting the vast majority of organizations investing in big data and AI initiatives.
Hardware

Company Stage

N/A

Total Funding

$739.4M

Founded

2017

Headquarters

Santa Clara, California

Growth & Insights
Headcount

6 month growth

23%

1 year growth

45%

2 year growth

151%
Locations
Santa Clara, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
CategoriesNew
QA & Testing
Quality Assurance
Requirements
  • Bachelor's in EE
  • Masters in EE
  • 8 years' experience verifying and validating complex SoC for Server, Storage, and Networking applications
  • Knowledge of industry-standard simulators, revision control systems, and regression systems
  • Authorized to work in the US and start immediately
Responsibilities
  • Contribute to the functional verification of the designs
  • Responsible for the full life cycle of verification, from planning to writing tests to debugging, collect and closing coverage
  • Work with the software and system validation teams to come up with test plans and executing them in emulation platforms