Full-Time

FPGA Engineer R&D

Posted on 2/21/2026

Pennsylvania State University

Pennsylvania State University

Compensation Overview

$76.7k - $164k/yr

No H1B Sponsorship

State College, PA, USA + 1 more

More locations: Reston, VA, USA

Hybrid

US Top Secret Clearance Required

Category
Electrical Engineering (1)
Requirements
  • Experience designing and testing with FPGAs
  • Experience with VHDL and/or Verilog
  • Knowledge and exposure to prototyping, signal processing, FPGA, cellular, wireless, algorithms, communications and creative thinking
  • Programming/Scripting in MATLAB, Python, and/or C++ with a Linux operating system environment
  • An ability to take your technical strengths and adapt them to new and adjacent areas of interest
  • Out-of-the-box thinking to find creative solutions for cutting edge technology, design, and applications
  • A solid understanding of advanced mathematics
  • A Bachelor's degree in an Engineering or Science related discipline (professional level)
Responsibilities
  • Design real-time digital signal processing systems using FPGAs
  • Work on FPGA development and systems engineering
  • Define and coordinate interfaces within the systems
  • Develop and carry out hardware and firmware tests
  • Work on signal processing algorithm development and/or optimization
  • Analyze cost and risk factors involved in system development activities
  • Perform system verification and validation to ensure efficiency, reliability and compatibility
  • Mentor and/or train lower level employees and students in the department and/or division (intermediate professional level)
  • Perform tasks of a larger scope and lead specific FPGA tasks within the project scope (intermediate professional level)
  • Initiate or contribute data/analysis/design for use in technical reports, documents, proposals, or oral/written presentations (intermediate professional level)
  • Manage FPGA projects of small or moderate size and scope; make substantial contributions to determining feasibility of goals and objectives; responsible for assuring quality, cost effectiveness and timeliness of assigned projects (advanced professional level)
  • Develop project status reports for appropriate distributions (advanced professional level)
  • Assist in concept development and participate in the design analyses of engineering systems independently evaluating, selecting, and applying scientific or engineering procedures and techniques to assignments (advanced professional level)
  • Author or co-author papers, proposals, presentations and reports on defined topics (advanced professional level)
  • Contribute to proposals, reports and presentations in the division related to FPGA efforts while maintaining external research relationships (advanced professional level)
Pennsylvania State University

Pennsylvania State University

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