Full-Time

Principal Lab Validation Engineer

Confirmed live in the last 24 hours

Astera Labs

Astera Labs

201-500 employees

Semiconductor connectivity solutions for AI and cloud

Hardware

Senior

Santa Clara, CA, USA

Requirements
  • Minimum of a Bachelor’s in Electrical Engineering
  • Minimum of 10 years’ hands-on mixed high-speed lab experience
  • C programming language
Responsibilities
  • Characterize and isolate root causes at system and PHY electrical level
  • Modify device firmware for testing engineering theories
  • Experiment and validate potential screens at ATE lab
  • Participate in New Product Development process
  • Drive physical failure analysis to isolate and image defects

Astera Labs specializes in semiconductor-based connectivity solutions, including PCIe, CXL, and Ethernet technologies, designed to optimize cloud and AI infrastructure by addressing performance bottlenecks in data-centric systems. Their purpose-built products enable high-bandwidth, low-latency interconnects for compute, storage, and accelerator resources, as well as robust CXL and PCIe connectivity for GPUs, AI accelerators, and networking applications.

Company Stage

IPO

Total Funding

$739.4M

Headquarters

Santa Clara, California

Founded

2017

Growth & Insights
Headcount

6 month growth

25%

1 year growth

47%

2 year growth

124%