What you’ll be doing:

• Plan, design and implement bare metal driver code (diagnostic firmware) using C/C++ to validate advanced ARM-based SOC.
• Develop Firmware for pre-silicon and post-silicon validation of current and future SOCs.
• Validation on pre-silicon emulation, FPGA, and post-silicon validation platforms. 
• Follow modular development practices so the firmware is reusable across verification, validation, and mission firmware teams. 
• Implement, run, and debug validation tests for block, subsystem, and full chip. 
• Continuously enhance tools and methodologies used for validation.
• Work in a dynamic and fast-paced startup environment and with a team of passionate engineers. 
• Work with Architects, design, verification, and mission firmware Teams to define system-level validation plans and prove that SOC meets the functional, coverage, performance, and power targets of the architecture and design. 

What you’ll have:

• 8+ years of experience in hardware RTL, verification, and validation. 
• Experience in pre-silicon emulation, FPGA, and post-silicon validation platforms. 
• Hands-on experience developing bare metal firmware for IPs such as LPDDR, Ethernet, I2C, SPI, eMMC, Watchdog Timers, Interrupts, GPIOs, PLLs, UART, high-speed serdes, etc.
• Proficient in debugging complex SOC or CPU core designs using industry-standard debugging tools - JTAG, Lauterbach, etc. 
• Proficient in C/C++, assembly, Perl/Python, and GIT. 

Nice to haves:

• Experience in SOC verification flow and methodology - using C/C++ and SV/UVM flow
• Experience in running simulations and debugging RTL and FW issues in simulation env