Full-Time

Member of Technical Staff

ASIC Verification

Updated on 8/19/2026

Netpreme

Netpreme

11-50 employees

Photonic interconnects enabling AI data transfer

No salary listed

H1B Sponsorship Available

Boston, MA, USA + 1 more

More locations: Santa Clara, CA, USA

In Person

Relocation assistance is available.

Bachelor's, Master's, PhD

Category
Electrical Engineering (1)
Hardware Engineering (1)
Software Engineering (1)
Required Skills
LLM
Computer Networking

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Requirements
  • A Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
  • At least 5 years of ASIC or system-on-chip verification experience.
  • Technical leadership, communication, and stakeholder-management capabilities.
  • Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints.
  • Strong knowledge of the full ASIC or system-on-chip development cycle from microarchitecture development through tape-out in advanced process technologies.
  • Expertise in verification methodologies.
  • Hands-on design experience with one or more industry standards or protocol stacks such as Ethernet, UCIe, or UALink.
  • Ability to optimize designs for power, performance, and area and integrate major subsystems including interconnect, input/output, and memory.
  • Proficiency with front-end development tools and methodologies, scripting for automation, and flow integration.
Responsibilities
  • Verify silicon, intellectual property, and subsystems.
  • Provide technical leadership in defining intellectual property and system-on-chip verification from microarchitecture through design and tape-out.
  • Conduct design reviews to ensure adherence to best practices.
  • Guide the team in optimizing designs to meet performance, power, and area goals.
  • Coordinate with architecture, design, physical design, firmware, design-for-test, and post-silicon teams to ensure system-level functionality.
  • Interface with external intellectual-property vendors, foundries, and electronic-design-automation tool providers to address dependencies and roadblocks and support team deliverables.
Desired Qualifications
  • Verification and tape-out experience for an advanced silicon device.
  • Post-silicon validation experience for a silicon ASIC or system-on-chip.
  • A PhD in Electrical Engineering, Computer Engineering, or a related field.
  • Experience managing relationships with external design partners, intellectual-property vendors, and foundries.
  • Knowledge of design-for-testability, post-silicon debugging and validation, and manufacturing testing.

Netpreme develops photonic networking solutions to remove data transmission bottlenecks in AI systems, with a focus on high-bandwidth optical interconnects for XPU memory expansion. Its products combine hardware and software that integrate optical interconnects into AI compute systems, moving data over light instead of electrical networks. The approach specifically targets memory expansion paths for AI accelerators using photonics to improve data flow at the AI data plane. The goal is to speed up AI communication, increase efficiency, and scale AI workloads by providing deployable photonic interconnect components for AI infrastructure.

Company Size

11-50

Company Stage

N/A

Total Funding

N/A

Headquarters

Cambridge, Massachusetts

Founded

2024

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Simplify Jobs

Simplify's Take

What believers are saying

  • Netpreme posted multiple 2026 ASIC and ML jobs, signaling active product execution.
  • Its May 2026 MLSys talk and booth presence pulled direct attention from researchers.
  • Patent applications 63/793,877, 63/838,102, and 63/951,047 strengthen defensibility.

What critics are saying

  • PitchBook shows only $200K raised, despite a claimed July 2025 $11.7M filing.
  • No public customer deployments exist; prototype-heavy hiring suggests revenue slips into 2027.
  • NVIDIA and custom-silicon incumbents can obsolete Netpreme before silicon tapeout.

What makes Netpreme unique

  • Netpreme's X-Mem MPU targets the memory wall for agentic AI in 2026.
  • It combines photonic networking with expandable distributed memory across Boston and Santa Clara.
  • MLSys 2026 and HotI 2026 visibility validate unusually deep systems credibility.

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Benefits

Health Insurance

Dental Insurance

Vision Insurance

Life Insurance

Relocation Assistance

Meal Benefits

401(k) Company Match

Company Equity

Performance Bonus

Growth & Insights

Headcount

6 month growth

-12%

1 year growth

-12%

2 year growth

-12%