Principal Workload Performance Architect @ Tenstorrent

Principal Workload Performance Architect

Posted on 12/30/2022

INACTIVE

Locations

Santa Clara, CA, USA

Experience Level

Entry

Junior

Mid

Senior

Expert

Desired Skills

Data Analysis

Data Structures & Algorithms

C/C++/C#

Requirements

BS/MS/PhD in EE/ECE/CE/CS
Strong background in CPU ISA, u-architecture research, and performance benchmarks
Familiar with program tracing flows (SIMPOINT, SMART,..) to capture traces for applications
Strong understanding of ML/AI algorithms, GCC and LLVM compilers, and OS kernel
Proficient in C/C++ programming. Experience in the development of highly efficient C/C++ performance models

Responsibilities

Collaborate with the software and platform architecture teams to understand hardware requirements for AI accelerator compiler, OS, video/image/voice processing, security, networking, and virtualization technology. Identify the application performance bottlenecks and functional requirements
Perform full-stack workload characterization and performance analysis for AI, HPC, and CPU general-purpose applications. Identify representative benchmarks for the workloads. Perform data-driven analysis based on software profiling, performance model simulation, or analytical models to evaluate software and architecture solutions to PPA
Set CPU architecture direction based on the data analysis and work with a cross-functional team to achieve the best hardware/software solutions to meet PPA goals
Characterizing real-world workloads, conducting end-to-end system performance analysis and workload decomposition to gather requirements for SoC solutions. Generate representative CPU, accelerators, and SoC traces for the performance model to study PPA impacts and guide architecture decisions
Work with Tenstorrent's graph compiler team and LLVM/GCC open source community to drive AI/CPU performance improvements. Identify the compiler optimization and align architecture and the compiler teams for implementing the improvements
Drive analysis and correlation of performance feature both pre and post-silicon

Desired Qualifications

Understanding SOC fabric, coherency protocols, memory technology, and accelerator technology is a plus

The Tenstorrent team combines technologists from different disciplines who come together with a shared passion for AI and a deep desire to build great products. We value collaboration, curiosity, and a commitment to solving hard problems. Find out more about our culture.

AI is redefining the computing paradigm. The new paradigm computation demand is incommensurable with the existing software and hardware criteria. The best AI solutions require unifying the innovations in the software programming model, compiler technology, heterogenous computation platform, networking technology, and semiconductor process and packaging technology. Tenstorrent drives the innovations through holistic views of each technological component in software and hardware to unify them to create the best AI platform.

As a performance architect in the dynamic and motivated Tenstorrent Platform Architecture team, you will work in a cross-functional team on ML software stacks, HPC and general-purpose workloads, graph compiler, cache coherence protocols, superscalar CPU, fabric/interconnection, networking, and DPU.

Responsibilities

Collaborate with the software and platform architecture teams to understand hardware requirements for AI accelerator compiler, OS, video/image/voice processing, security, networking, and virtualization technology. Identify the application performance bottlenecks and functional requirements.
Perform full-stack workload characterization and performance analysis for AI, HPC, and CPU general-purpose applications. Identify representative benchmarks for the workloads. Perform data-driven analysis based on software profiling, performance model simulation, or analytical models to evaluate software and architecture solutions to PPA.
Set CPU architecture direction based on the data analysis and work with a cross-functional team to achieve the best hardware/software solutions to meet PPA goals.
Characterizing real-world workloads, conducting end-to-end system performance analysis and workload decomposition to gather requirements for SoC solutions. Generate representative CPU, accelerators, and SoC traces for the performance model to study PPA impacts and guide architecture decisions.
Work with Tenstorrent’s graph compiler team and LLVM/GCC open source community to drive AI/CPU performance improvements. Identify the compiler optimization and align architecture and the compiler teams for implementing the improvements.
Drive analysis and correlation of performance feature both pre and post-silicon

Experience & Qualifications

BS/MS/PhD in EE/ECE/CE/CS
Strong background in CPU ISA, u-architecture research, and performance benchmarks.
Understanding SOC fabric, coherency protocols, memory technology, and accelerator technology is a plus.
Familiar with program tracing flows (SIMPOINT, SMART,..) to capture traces for applications.
Strong understanding of ML/AI algorithms, GCC and LLVM compilers, and OS kernel.
Proficient in C/C++ programming. Experience in the development of highly efficient C/C++ performance models.

Locations:

We have presence in Toronto, Austin, Santa Clara, Portland, and Raleigh. We are open to remote candidates on a case-by-case basis.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

51-200 employees

Website

Computer processor architecture manufacturer

Company Overview

Tenstorrent is on a mission to address the rapidly growing compute demands for software 2.0. The company designs processors that are optimized for neural network inference, training and can also execute other types of parallel computation.

Company Core Values

Collaboration
Curiosity
Commitment to solving hard problems