Senior Staff Engineer
HBM Design Architect
Posted on 3/22/2024
Samsung

10,001+ employees

One of the world's largest producers of electronic devices
Company Overview
Samsung's mission is to devote its talent and technology to creating superior products and services that contribute to a better global society. Samsung produces a wide range of electronic devices and is ranked as a top 10 global brand.

Company Stage

Seed

Total Funding

$100M

Founded

1969

Headquarters

Suwon-si, South Korea

Growth & Insights
Headcount

6 month growth

0%

1 year growth

8%

2 year growth

5%
Locations
San Jose, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
CategoriesNew
Hardware Engineering
Computer Hardware Engineering
Electronic Hardware Engineering
Hardware Validation & Testing
Requirements
  • Bachelors with 15+ years of relevant industry experience, or Masters with 13+ years or PhD with 10+ years in electrical engineering or related technical field preferred
  • Experience in data path design of HBM including buffer die
  • Expert level knowledge in HBM data path from a buffer die to a core die through TSV
  • Extensive knowledge of CMOS circuit design and device physics
  • Extensive knowledge of schematic entry and simulation using Finesim and/or Hspice
  • Well versed in DRAM and HBM technology
  • Experience in custom circuit design in memory process
  • Experience in HBM buffer die and/or core die design
  • Experience and/or knowledge of the emerging technologies (UCIe, Processing in memory) in server memory and storage systems
  • Highly motivated with good verbal and written communication skills
  • Creativity in problem solving
Responsibilities
  • Design and/or provide guidance on data path in HBM buffer die
  • Participate in defining architecture of PHY design for TSV
  • Perform timing and power analysis on data path in HBM buffer die
  • Work closely with HBM development team and SoC team to come up with the best architectural solutions
  • Participate in the definition of HBM buffer die architecture
  • Guide physical design team on SI/PI