Full-Time

Senior FPGA Design Engineer

Posted on 4/18/2024

Ouster

Ouster


Senior

San Francisco, CA, USA

Required Skills
Verilog
VHDL
FPGA
Requirements
  • Bachelors in Electrical, Computer Engineering or equivalent. Masters is highly desired.
  • 5+ years of experience in FPGA development including HDL code development, simulation, test bench development, synthesis, and timing closure.
  • Highly proficient in HDLs like Verilog and SystemVerilog (or VHDL).
  • Proficient in C or C++ programming language.
  • Experience with Xilinx or Intel FPGA toolchain.
  • Strong embedded system development experience in CPU and FPGA based devices such as Xilinx Zynq or Intel Arria devices.
Responsibilities
  • Define, develop, integrate, and test features across our FPGA stack
  • General FPGA development including RTL, simulation, high-speed digital design, DSP algorithm development, verification, synthesis, and timing analysis.
  • Perform hands-on work using laboratory tools for board bring up and troubleshooting.
  • Work on high impact customer-facing features and integrate customer feedback in the development process
  • Work cross-functionally with embedded software engineers, other ASIC/FPGA designers, and business leaders on functionality, interfaces, and documentation
  • Build automation scripts for repetitive tasks to facilitate efficiency and reliability

Company Stage

N/A

Total Funding

N/A

Headquarters

N/A

Founded

N/A