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Full-Time

FPGA Design Engineer

Staff

Posted on 6/27/2024

d-Matrix

d-Matrix

51-200 employees

AI compute platform using in-memory computing

AI & Machine Learning
Data & Analytics
Hardware

Senior, Expert

Santa Clara, CA, USA

Category
Electrical Engineering
Hardware Engineering
Computer Hardware Engineering
Electronic Hardware Engineering
Hardware Validation & Testing
Finance & Banking
Required Skills
Verilog
Python
Management
VHDL
FPGA
Requirements
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • Minimum of 5+ years of experience in FPGA design and verification
  • Expertise in hardware design using Verilog or VHDL
  • Familiarity with RISC-V architecture and embedded systems development
  • Experience with scripting languages like Python for test automation
  • Experience with industry-standard management protocols (MCTP, PLDM, SPDM)
  • Experience with platform BMC (Baseboard Management Controller)
  • Knowledge of power management techniques (PMBus)
  • Knowledge of hardware security and secure boot concepts
  • Experience with cloud server architectures and concepts
Responsibilities
  • Design and verify FPGA-based solutions for d-Matrix AI inference accelerator management
  • Define FPGA microarchitecture specifications and collaborate with stakeholders
  • Develop resilient dual boot architecture for multi-core multi chiplet booting
  • Design and implement hardware and software modules for platform power management
  • Interface with host server BMC through SMBus mailbox with management protocol overlays
  • Integrate RISC-V CPU cores and related firmware into FPGA designs
  • Develop eFuse controller within the FPGA
  • Design and integrate a secure boot solution adhering to NIST standards within the FPGA
  • Collaborate with cross-functional teams for hardware-software integration
  • Author Python scripts for hardware testing and automation

d-Matrix is developing a unique AI compute platform using in-memory computing (IMC) techniques with chiplet level scale-out interconnects, revolutionizing datacenter AI inferencing. Their innovative circuit techniques, ML tools, software, and algorithms have successfully addressed the memory-compute integration problem, enhancing AI compute efficiency.

Company Stage

Series B

Total Funding

$161.5M

Headquarters

Santa Clara, California

Founded

2019

Growth & Insights
Headcount

6 month growth

0%

1 year growth

20%

2 year growth

127%
INACTIVE