d-Matrix has fundamentally changed the physics of memory-compute integration with our digital in-memory compute (DIMC) engine. The “holy grail” of AI compute has been to break through the memory wall to minimize data movements. We’ve achieved this with a first-of-its-kind DIMC engine. Having secured over $154M, $110M in our Series B offering, d-Matrix is poised to advance Large Language Models to scale Generative inference acceleration with our chiplets and In-Memory compute approach. We are on track to deliver our first commercial product in 2024. We are poised to meet the energy and performance demands of these Large Language Models.The company has 100+ employees across Silicon Valley, Sydney and Bengaluru.

Our pedigree comes from companies like Microsoft, Broadcom, Inphi, Intel, Texas Instruments, Lucent, MIPS and Wave Computing. Our past successes include building chips for all the cloud hyperscalers globally - Amazon, Facebook, Google, Microsoft, Alibaba, Tencent along with enterprise and mobile operators like China Mobile, Cisco, Nokia, Ciena, Reliance Jio, Verizon, AT&AT. We are recognized leaders in the mixed signal, DSP connectivity space, now applying our skills to next generation AI.  

Location:

Hybrid, working onsite at our Santa Clara, CA headquarters 3 days per week.

What You Will Do:

• Design and verify FPGA-based solutions for d-Matrix AI inference accelerator management

• Define FPGA microarchitecture specifications and collaborate with stakeholders to ensure alignment with project requirements.

• Develop resilient dual boot architecture for multi-core multi chiplet booting

• Design and implement hardware and software modules for platform power management, health monitoring, and telemetry data acquisition.

• Interface with host server BMC through SMBus mailbox with management protocol overlays such as MCTP, PLDM and SPDM

• Integrate RISC-V CPU cores and related firmware into FPGA designs.

• Develop eFuse controller within the FPGA

• Design and integrate a secure boot solution adhering to NIST standards within the FPGA to enable secure booting of d-Matrix accelerator chiplets

• Collaborate with cross-functional teams to ensure seamless hardware-software integration and support inference accelerator hardware bring-up and troubleshooting.

• Author Python scripts for hardware testing and automation

What You Will Bring:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field, Master’s degree preferred with a Minimum of 5+ years of experience in FPGA design and verification.

• Expertise in hardware design using Hardware Description Languages (HDLs) like Verilog or VHDL

• Familiarity with RISC-V architecture and embedded systems development

• Understanding of hardware-software integration concepts

• Experience with scripting languages like Python for test automation

• Strong analytical and problem-solving skills

• Excellent communication, collaboration, and teamwork abilities

• Thrive in dynamic environments where innovative problem-solving is key

• Experience with industry-standard management protocols (MCTP, PLDM, SPDM)

• Experience with platform BMC (Baseboard Management Controller)

• Knowledge of power management techniques (PMBus)

• Knowledge of hardware security and secure boot concepts.

• Experience with cloud server architectures and concepts

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Equal Opportunity Employment Policy

d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day.

d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.