Full-Time

Quantum Superconducting Interconnect Integration Engineer

Updated on 7/21/2026

GlobalFoundries

GlobalFoundries

10,001+ employees

Semiconductor foundry delivering specialized chips

Compensation Overview

$118k - $210k/yr

Company Does Not Provide H1B Sponsorship

Malta, NY, USA

In Person

On-site in Malta, New York; up to 20% travel.

Category
Quantum Computing
Required Skills
Assembly

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Requirements
  • Master’s in Electrical Engineering, Mechanical Engineering, Chemical Engineering, Materials Science or related field from an accredited degree program
  • MS degree with at least 10 years of prior related work experience
  • Must have at least an overall 3.0 GPA and proven good academic standing
  • Language Fluency - English (Written & Verbal)
  • Travel - Up to 20%
Responsibilities
  • Lead development of superconducting interconnect and interposer integration processes (e.g., Nb, Al, In, superconducting liners, redistribution layers)
  • Develop 2.5D and 3D cryogenic interposer architectures for quantum systems
  • Define routing, metallization, and integration schemes optimized for: Low-loss RF/microwave signal propagation Minimal thermal leakage Cryogenic reliability
  • Own end-to-end integration of interposer and interconnect flows across: Wafer-level processes (RDL, TSV/TOV, via formation) Die-level integration (bump, bonding, assembly interfaces)
  • Drive process integration planning to enable new capabilities and prototyping across programs
  • Architect and integrate multi-die quantum packaging solutions, including: Qubit die + control electronics Superconducting interposers
  • Support chiplet-style and system-level integration for scalable quantum systems
  • Translate system-level requirements into interconnect density, pitch, and routing specifications
  • Enable early-stage prototyping lots, ensuring smooth execution through fab and assembly lines
  • Support transition to manufacturable, scalable flows
  • Support integration strategies to improve yield and manufacturability and reduce cost/cycle time
  • Identify and drive understanding of failure modes, including: Interconnect degradation Cryogenic stress-induced defects Interface reliability issues
  • Lead root-cause analysis and corrective actions
  • Collaborate with device and test teams to ensure interconnect solutions: Preserve qubit performance (coherence, noise) Meet cryogenic electrical and thermal constraints
  • Support system-level validation and characterization at cryogenic conditions
  • Develop expertise in: Superconducting materials and interfaces Low-temperature material behavior and integration challenges
  • Work with equipment and suppliers to define process/tool requirements for: Superconducting metallization Interposer fabrication Advanced 3DHI integration
  • Interface across: Device / qubit teams Assembly, bump, and TSV integration teams Reliability and modeling teams
  • Collaborate with OSATs, suppliers, and research partners to co-develop interconnect technologies
  • Drive next-generation interconnect scaling (pitch, density, materials) aligned with quantum system scaling needs
  • Contribute to advanced packaging roadmap (APPC / cryo 3DHI)
  • Identify and evaluate emerging interconnect technologies and integration schemes
  • Generate: Integration flow documentation Process specs and design rules
  • Provide technical reports and progress updates to internal and external stakeholders
  • Contribute to IP, publications, and conference outputs
  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
  • Take part in hiring of other Advanced Packaging team members in Singapore
  • Mentor and guide new hires to assume their roles and responsibilities
  • Other duties as assigned by manager
Desired Qualifications
  • Education – PhD education level preferred with at least 8 years of prior related work experience
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
  • Project management skills, i.e. the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity
  • Strong written and verbal communication skills
  • Strong planning & organizational skills

GlobalFoundries is a semiconductor foundry that manufactures chips for a broad range of customers, focusing on feature-rich, reliable technologies for cars, IoT, 5G, and other high-growth markets. It operates by fabricating silicon wafers for customer designs, offering mature, specialized processes rather than chasing the most advanced nodes. This makes it different from peers that prize the latest process nodes; GlobalFoundries emphasizes diversification across a global manufacturing footprint (U.S., Europe, Singapore) and stable supply for essential applications. Its goal is to be a leading supplier of high-volume, specialty manufacturing that enables reliable chips for everyday devices and growing tech markets.

Company Size

10,001+

Company Stage

IPO

Headquarters

Town of Malta, New York

Founded

2009

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Simplify Jobs

Simplify's Take

What believers are saying

  • GF qualified SLATE 3D packaging on 9SW RF-SOI platform shipping volume in H2 2027.
  • GF secured $16B US manufacturing investment and CHIPS Act funding targeting AI and defense.
  • GF partnered with Sivers on silicon photonics targeting $25B pluggable optics market by 2030.

What critics are saying

  • Mubadala's 4.1% block sale in July 2026 triggers 7.6% share drop and persistent ownership overhang.
  • GF's Altman Z-Score of 2.89 indicates moderate bankruptcy risk amid -$265M net income in 2024.
  • TSMC and Samsung expand mature-node capacity in US and Europe directly encroaching on GF's automotive focus.

What makes GlobalFoundries unique

  • GF focuses on specialty nodes 12nm to 90nm instead of chasing sub-7nm Moore's Law.
  • GF operates four geographically diversified fabs in US, Germany, and Singapore for supply resilience.
  • GF delivers sole-sourced, feature-rich chips with 90% of design wins being exclusively sourced.

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