Design Verification Engineer

• Plan the verification of digital design blocks by fully understanding the design specification and interacting with design verification leads and design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Close coverage measures to identify verification holes and to show progress towards tape-out.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog for ASICs or FPGAs.
• Experience verifying digital Intellectual Property (IP) and subsystems.
• Experience in Design Verification (DV) Testbenches/Environments.

Preferred qualifications:

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience creating/using verification components and environments in methodology (e.g., Verification Methodology Manual, Open Verification Methodology, Universal Verification Methodology).
• Experience with verification techniques.
• Experience with scripting languages like Perl or Python.
• Familiarity with Application-specific integrated circuit (ASIC) standard interfaces (e.g., MIPI standardized interfaces, ARM AMBA interfaces, common low-speed peripheral interfaces like uart, i2c, etc.).

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 4 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog for ASICs or FPGAs.
• Experience verifying digital Intellectual Property (IP) and subsystems.
• Experience in Design Verification (DV) Testbenches/Environments.