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Soc Chip Lead

Posted on 6/27/2024

Celestial AI

Celestial AI

51-200 employees

Silicon photonics for high-performance computing

AI & Machine Learning

Compensation Overview

$200k - $225kAnnually

+ Equity


Santa Clara, CA, USA

Hardware Engineering
Electronic Hardware Engineering
System Hardware Engineering
Required Skills
  • Must have a BS or MS degree in either EE or CS and have a minimum of 12 years of relevant experience in high performance SOC ASIC development from concept to production
  • Excellent communication, collaboration, and organizational skills
  • Requires hands-on experience with all stages of VLSI development as well as a proven track record of building and leading interdisciplinary and cross-functional teams
  • Strong analytical and problem-solving skills
  • Highly organized to effectively managing competing priorities
  • Demonstrated experience in successfully taping out multiple silicon, experience in FinFET technologies a must
  • Must have a strong understanding of all phases of development in ASIC projects
  • Experience in interconnect design and mixed signal is highly desirable
  • Scale the ASIC design team with world-class engineers
  • Provide technical leadership and management for the entire SoC development process
  • Drive architecture, design, verification, physical design, silicon bring-up, CAD methodologies
  • Be the point of technical contact for all the third-party IP and design services
  • Drive schedules, priorities, and goals to meet complex business needs and deadlines across geographically distributed teams
  • Be the technical point of contact to cross functional System in Package development and software
  • Provide technical leadership through role modeling, mentoring and teamwork

Celestial AI has developed the Photonic Fabric™ technology platform, utilizing silicon photonics for data movement within and between chips, enabling high-performance computing solutions with differentiated single node performance and efficient scalability for multi-node and multi-model applications. The platform leverages integrated silicon photonics for data movement, providing significant performance gains for machine learning and high-performance computing applications, with a projected addressable market exceeding $70 billion in 2025.

Company Stage

Series C

Total Funding



Santa Clara, California



Growth & Insights

6 month growth


1 year growth


2 year growth