SoC Design Verification Engineer

Job Details:

Job Description: 

Join Intel and build a better tomorrow. Intel is in the midst of an exciting transformation, with a vision to create and extend computing technology to connect and enrich the lives of every person on Earth. So join us and help us create the next generation of technologies that will shape the future for decades to come.

 IP Security Client Product Group (ISCP) specializes in delivering IPs, Chipsets and SoCs for Intel’s Client and server roadmap. Successful candidate will be part of the ISCP SoC Front End Design (SFD) Team, which specializes in the end-to-end integration and pre-silicon validation for multiple IPs into Intel’s client chipsets and SoC products.

As a SoC Design Verification Engineer, your responsibilities will include but are not limited to:

• Performs functional logic verification of an integrated SoC to ensure design will meet specifications.

• Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.

• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and performance, and uncover bugs.

• Replicates, root causes, and debugs issues in the pre-silicon environment.

• Finds and implements corrective measures to resolve failing tests.

• Collaborates and communicates with SoC architects, micro-architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.

• Incorporates and executes security activities within test plans, including regression and debug tests, to ensure security coverage.

• Maintains and improves existing functional verification infrastructure and methodology.

• Absorbs learning from post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages, and proliferates to future products.

Behavioral traits that we are looking for:

• Robust understanding of fundamental principles of  SOCs, Chipset architecture.

• Experience with one or more scripting languages to facilitate automation.

• Strong debug skills and self-reliance in taking an issue to closure with internal and external partners. Takes ownership of assigned tasks.

• Keen problem solver, strong communicator, quick learner, effective team player and open to learning and teaching new and more efficient validation execution techniques to meet time-to-market

Qualifications:

Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum skills and experience that will get you noticed: 

• Bachelor’s Degree in Degree in Electrical engineering or Computer engineering and 4+ years of experience -OR- Master’s Degree with 3+ years of experience
   

• Candidate must have experience in at least 2 of the following: 

  ·Computer architecture,

  ·System Verilog, OVM/UVM

  ·SOC-level design integration and or validation,

  ·simulation-based debug
   

Preferred skills and experience that will make you stand out:

• Design and/or Design Verification with developing, maintaining, and executing complex IPs and/or SOCs.

• Proficiency in UVM/SV constrained-random coverage-based design verification.

• OVM/UVM, System Verilog, constrained random verification methodologies.

• Complete verification life cycle (verification architecture, test plan, execution, debug, coverage closure).

• Developing validation test suites and driving continuous improvement into existing validation test suites and methodologies.

• UVM/SV Verification architecture, development and validation experience.

• Experience in SOC Pre-Silicon Validation.

Job Type:

Experienced Hire

Shift:

Shift 1 (United States of America)

Primary Location: 

US, California, Folsom

Additional Locations:

US, California, Santa Clara

Business group:

The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel’s PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones. Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people’s potential - allowing each person use our products to focus, create and connect in ways that matter most to them. As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products. As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.  Find more information about all of our Amazing Benefits here:

https://jobs.intel.com/en/benefits

Annual Salary Range for jobs which could be performed in the US:

$139,710.00-$197,230.00

Salaryrangedependent on a number of factors including location and experience.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.