Job Details:

Job Description: 

Intel’s Technology Development Component Research (TD CR) delivers innovative semiconductor and packaging technologies research and development. The group focuses on unique, enabling capabilities across all aspects of Intel’s semiconductor processing and packaging roadmap.

Components Research engineers are responsible for leading programs to design, fabricate and analyze novel devices/interconnects/patterning, materials, and integration schemes across a wide variety of novel applications.

The Components Research (CR) team is looking for a passionate intern to join our team as a ferro-electric FET engineer intern working in CR’s coupon line in the areas both device fabrication and electrical characterization. The coupon line enables the early evaluation and dispositioning of new technologies in a primarily lab environment. Final scoping of project will be determined based on intern experience and business needs.

The ideal candidate should exhibit the following behavioral traits:

• Highly motivated individual willing to work under pressure and deliver high quality results on time. Problem-solving and analytical skills.
• Effective prioritization and time management skills. Stakeholder management, collaboration, tolerance for ambiguity, and critical thinking.
• Teamwork ethics.
• Willing to work in an agile work environment with a fast-paced task flow.
• Good interpersonal skills.

Length of internship: Minimum of 3 months for summer 2024 with the possibility to extend it as per business needs.

Qualifications:

You must possess the below requirements to be initially considered for this position.

Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.

Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.

Minimum qualifications:

• Must be pursuing a PhD degree in Electrical Engineering, Physics or Materials Science.
• Familiarity with Perovskites and/or ferroelectrics.

Preferred qualifications:

• Have a proven track record of role modelling safety in the lab environment.
• Experience in the operation and/or maintenance of semiconductor equipment in either a fab or lab environment.
• Experience in the research and development of ferro-electic materials, device fabrication and device characterization in a fab or lab environment.
• Willing to work in a lab and clean room environment, wearing GorTex gowns, booties, safety glasses, gloves.

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location: 

US, Oregon, Hillsboro

Additional Locations:

Business group:

As the world’s largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.