Principal Design for Test Engineer
Updated on 5/24/2023
Fort Collins, CO, USA
Experience Level
Desired Skills
  • BS/MS/PhD in EE/ECE/CE/CS with at least 5 years of industry experience in advanced DFx techniques
  • DFx experience implementing in finFET technologies
  • Experience with industry standard ATPG and DFx insertion CAD tools
  • Familiarity with SystemVerilog and UVM
  • Fluent in RTL coding for DFx logic including lock-up latches, clock gates, and scan anchors
  • Understanding of low-power design flows such as power gating, multi-Vt and voltage scaling
  • Good understanding of high-performance, low-power design fundamentals
  • Knowledge of fault models including Stuck-at, Transition, Gate-Exhaustive, Path Delay, IDDQ, and Cell Aware
  • Exposure to post-silicon testing and tester pattern debug are major assets
  • Experience with Fault Campaigns a plus
  • Strong problem solving and debug skills across various levels of design hierarchies
  • ATPG and test coverage analysis using industry standard tools
  • JTAG, Scan Compression, and ASST implementation
  • Gate level simulation using Synopsys VCS and Verdi
  • Support silicon bring-up and debug
  • MBIST planning, implementation, and verification
  • Support Test Engineering on planning, patterns, and debug
  • Develop efficient DFx flows and methodology compatible with front end and physical design flows

51-200 employees

Computer processor architecture manufacturer
Company Overview
Tenstorrent is on a mission to address the rapidly growing compute demands for software 2.0. The company designs processors that are optimized for neural network inference, training and can also execute other types of parallel computation.
Company Core Values
  • Collaboration
  • Curiosity
  • Commitment to solving hard problems