Silicon RTL Integration Engineer

Responsibilities

• Responsible for integrating various internal/external IP into the SoC.
• Implement design quality checks such as Lint , CDC/RDC and UPF.
• Test and debug of SoC features.
• Participate in synthesis , timing closure and silicon bringup.
• Scripting to automate flows.

Requirements

• Strong fundamentals in digital ASIC design; experience using SystemVerilog
• Strong skills in various front end design tools and techniques such as logic equivalence, lint checks, clock and reset domain crossing and DFT.
• Experience designing with multiple power domains and writing UPF.
• Knowledge of SOC/CPU architecture
• Familiarity with high performance and low power design techniques.
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
• Ability to work well in a team spread across multiple sites and be productive under aggressive schedules.

Education and Experience

• PhD, Master’s Degree or Bachelor’s Degree in technical subject area.