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Summer Intern
Design Verification Engineer FC-6145
Posted on 9/5/2022
INACTIVE
Locations
Austin, TX, USA
Experience Level
Intern
Desired Skills
Linux/Unix
Perl
Python
MATLAB
Verilog
Requirements
  • Must be pursuing a Masters in Electrical or Computer Engineering with a GPA of 3.6 or above
  • Strong background with HDLs (e.g. Verilog, VHDL) and HVLs (e.g. SystemVerilog/UVM)
  • Scripting (e.g. Perl, Python, Unix/Linux shell)
  • Knowledge of signal processing concepts, Matlab
  • Object oriented programming (e.g. SystemVerilog)
Responsibilities
  • Assist with verification planning
  • Support with testbench development
  • Maintenance with failure analysis and resolution
  • Help with coverage analysis and population
  • Assist with failure analysis and debug
  • Work on digital/mixed-signal modeling, directed/constraint-random test generation, and flow development
Cirrus Logic

1,001-5,000 employees

Semiconductor supplier
Company Overview
Cirrus Logic is committed to creating a responsible, sustainable business environment for the global communities where they work and live. Delivering innovative signal processing products that exceed their customers' expectations for quality and delivery.
Benefits
  • Health Insurance
  • 401(k)
  • Paid Time Off
  • Monthly Concerts
  • Weekly Happy Hours
  • Festival Tickets
  • On-Site Med Clinic
  • Community Events
Company Core Values
  • Continuous Improvement.
  • Innovation.
  • Integrity.
  • Communication.
  • Job Satisfaction.