Job Description

Western Digital is seeking a New College Graduate to join the Wafer Manufacturing Integration team in San Jose, CA. The candidate will be responsible for generating and maintaining product routes in a high-volume wafer manufacturing environment, as well as introducing new products to the manufacturing line. This engineer will also deliver process, design, program, and process/tool qualification wafers in a timely manner. 

Other responsibilities will include:

• performing wafer failure analysis, troubleshooting, and implementing corrective and preventive actions.
• serving as a focal point for continuous process improvement, and working with other functional teams: Manufacturing, Engineering, Design, Program, Yield, Quality, Equipment, and Development Teams.

The candidate should have good working knowledge of wafer-level device fabrication techniques, such as photolithography, thin film, plating, and CMP. The candidate’s skillset should include a problem-solving mindset, good project management skills, strong verbal and written communication, and the ability to thrive in a team environment. 

Qualifications

• Master’s or PhD degree in physics, chemistry, materials science, chemical engineering, or related engineering field with a graduation date between May 2023-June 2024.
• Excellent communication skills with the ability to work in a cross-functional team setting.
• Fundamental knowledge of wafer-level device fabrication techniques (photolithography, thin film, plating, CMP, etc.) and corresponding methodologies is required.
• Good project management, problem-solving, analytical, and presentation skills are required.
• Must possess a manufacturing process engineer mindset, the ability to work in a high-paced dynamic environment, and the ability to multi-task.
• Hands-on experience in processing and characterization is desirable.
• Experience in wafer-level magnetic recording head fabrication is preferred.