United States

Job Description

ESSENTIAL DUTIES AND RESPONSIBILITIES:

• Thorough understanding of High-Speed PHY and Datapath architectures and other clock recovery and schemes.
• In-depth knowledge of Timing budgeting and Analysis in custom high-speed designs
• Working knowledge of SI/PI Analysis with various models like IBIS/SPF etc
• Very analytical in nature and able to work in a multi-disciplinary environment
• Creative, out-of-the-box thinker with a high level of personal involvement
• Strong theoretical background with a pragmatic approach.
• Good verbal and written communication skills and experience working with different geographies.
• Good documentation and presentation skills
• High level of integrity and commitment to quality and timeliness.

Qualifications

REQUIRED:

• Bachelors/Masters degree in Electronics & Electrical engineering with 10+ years of experience in protocols like NAND(FLASH) Toggle mode/Onfi , DDR3/4/5, LPDDR3/4/5 GDDR3/4/5/6, HBM2/3/3E and other High speed interfaces
• Thorough understanding of High-Speed PHY and Datapath architectures and other clock recovery and schemes.
• Conversant with tools such as Cadence Virtuoso/Synopsys custom compiler/Hspice/Spectre/Finesim including statistical simulation methodologies
• Experience in Mixed-mode simulation and analog/digital co-simulation will be of added advantage.
• Experience in creating EDA model such as Verilog model, Liberty etc will be of added advantage.