Job Description

We are seeking a highly skilled and experienced Senior ASIC Designer to join our engineering team. The ideal candidate will have a strong background in both logic design, with extensive Verilog coding experience, and a good understanding of physical design. This role involves designing, developing, and optimizing ASICs for our next-generation products, ensuring high performance, efficiency, and scalability.

• Key Responsibilities:
  • Design and implement complex ASICs using System Verilog 
  • Technical oversee of physical design process, including synthesis, floor planning, power grid design, place and route, reset/clock tree synthesis,  design for manufacturability and timing closure.
  • Collaborate with cross-functional teams to define design specifications and requirements.
  • Optimize designs for power, performance, and area (PPA).
  • Micro-architecture of the modules you will be responsible for
  • Micro-architecture documentation.
  • Work with verification teams to review the test plans and provide input
  • Debug, root cause and fix issues found in the design as part of verification testing based on simulations or FPGA testing.
  • Stay abreast of the latest ASIC design technologies and methodologies.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. A Master’s degree is preferred.
• Minimum of 10 years of professional experience in ASIC design, with a strong focus on  logic design and good understanding of physical design
• Proficient in Verilog and System Verilog for RTL design and verification.
• Experience with ASIC design tools and methodologies, including EDA tools for synthesis, place and route, and timing analysis (e.g., Cadence, Synopsys).
• Deep understanding of digital design principles, including FSMs, data path architectures, and low power design techniques.
• Good understanding of physical design and related challenges, such as DFM (Design for Manufacturability), signal integrity, and power integrity.
• Experience with scripting languages such as Python or Perl for design automation.
• Strong analytical and problem-solving skills, with the ability to think creatively to overcome design challenges.
• Excellent communication and teamwork skills, with the experience leading projects and mentoring junior designer

• Desirable Skills:

• Knowledge of FPGA design and prototyping.
• Experience with analog design integration and mixed-signal design considerations.
• Familiarity with industry standards and protocols relevant to the company’s products.
• Participation in silicon bring-up, validation, and debugging
• Knowledge of TCP/IP, RoCE, RDMA Protocols, Ethernet, PCIe, TLS, IPSec and NVMe
• Design Experience with Cryptography, Root of Trust (RoT) items like Secure Boot, Secure Firmware Download, Secure Debug, Authentication and Attestation