Senior Engineer
FPGA Verification
Updated on 3/15/2024
Samsung

10,001+ employees

One of the world's largest producers of electronic devices
Company Overview
Samsung's mission is to devote its talent and technology to creating superior products and services that contribute to a better global society. Samsung produces a wide range of electronic devices and is ranked as a top 10 global brand.

Company Stage

Seed

Total Funding

$100M

Founded

1969

Headquarters

Suwon-si, South Korea

Growth & Insights
Headcount

6 month growth

0%

1 year growth

8%

2 year growth

5%
Locations
San Jose, CA, USA
Experience Level
Entry
Junior
Mid
Senior
Expert
Desired Skills
CAD
Verilog
Python
Data Science
Git
Perl
VHDL
FPGA
Linux/Unix
CategoriesNew
Hardware Engineering
Electronic Hardware Engineering
Hardware Validation & Testing
Requirements
  • Bachelor's degree with 5+ years of relevant industry experience, or Master's with 3+ years or PhD in data science engineering or related technical field preferred
  • Solid knowledge of SystemVerilog, UVM, Verilog, and Perl/Python
  • Exposure to PCIe, CXL, DDR, NVMe, TCP/IP, Ethernet protocols
  • Exposure to ARM subsystems, AXI, AHB protocols
  • Knowledge of design verification and functional coverage
  • Demonstrated ability with FPGA design tool flows, synthesis, timing analysis, partitioning, FPGA programming, bring-up, and testing
  • In-depth background in HDL development, Verilog coding, integration, synthesis, debugging, simulation, test bench creation, and debugging using CAD tools (Synopsys, Mentor, Cadence, or FPGA tools)
  • Hands-on lab prototype setup, testing, measurement, and debugging of storage solutions on FPGAs
  • Hands-on experience with hardware board bring-up, server system integration, and software integration with FPGAs
  • Familiar with Altera Agilex SoC/Xilinx FPGA target verification
  • Experience using UVM framework and associated tooling environments
  • Proficiency with Python is a plus
  • Familiar with revision control systems and platforms such as Git and Gitlab
Responsibilities
  • FPGA architecture, design, verification, lab bring-up, lab test, and validation of an FPGA prototype for storage applications
  • Research next-generation memory and storage controller features in an FPGA environment
  • Develop new IP for high-performance memory and storage solutions
  • Work with hardware/ software architects developing one-of-a-kind innovative FPGA prototypes and contribute to feasibility studies & developing solutions
  • Assist software architects in developing Linux/ Windows device drivers, test and debug
  • Developing unit and cluster level test benches, BFMs, random test generators, and functional coverage monitors, using system Verilog, UVM, C/C++, and python scripts
  • Developing test plans, random and directed test cases, performing logic verification, and functional coverage analysis
  • Developing frontend methodologies and tool flows
  • Participating in lab bring-up
  • Key contributor to the FPGA verification plan and major infrastructure development for a complex FPGA design
  • Collaborate with FPGA architects, verification lead, and design and test engineers to verify RTL design, ensuring adequate coverage and maximizing reusability
  • Develop verification plans, test benches, and UVM components to ensure code/functional coverage from block to full chip level simulation
  • Perform requirement traceability via Test Performance Specification (TPS) and capture results in Test Acceptance Report (TAR)
  • Contribute to continuous improvement and optimization of the UVM structure