What You’ll Do

The Memory Solutions Lab (MSL) is part of Samsung’s Memory Business Unit, the industry’s technology and volume leader in DRAM, NAND Flash, and SRAM memory. MSL’s vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are integral to Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

We are looking for an FPGA Verification Engineer to join our San Jose, CA team. The Candidate will be a key technical member of the System Architecture Lab.  The Candidate will join a team of experts who are researching and developing innovative data center/ cloud networking, storage, and computing ASIC/ FPGA and system solutions. The ideal Candidate must have prior experience developing leading-edge memory, networking, storage, and/or embedded computing solutions on FPGAs.

Location: Hybrid, working onsite at our San Jose, CA headquarters 3 days a week, with the flexibility to work remotely the remainder of your time.

Job ID: 41991

• FPGA architecture, design, verification, lab bring-up, lab test, and validation of an FPGA prototype for storage applications.
• Research next-generation memory and storage controller features in an FPGA environment.
• Develop new IP for high-performance memory and storage solutions.
• Work with hardware/ software architects developing one-of-a-kind innovative FPGA prototypes and contribute to feasibility studies & developing solutions.
• Assist software architects in developing Linux/ Windows device drivers, test and debug.
• Developing unit and cluster level test benches, BFMs, random test generators, and functional coverage monitors, using system Verilog, UVM, C/C++, and python scripts
• Developing test plans, random and directed test cases, performing logic verification, and functional coverage analysis.
• Developing frontend methodologies and tool flows.
• Participating in lab bring-up.
• Key contributor to the FPGA verification plan and major infrastructure development for a complex FPGA design
• Collaborate with FPGA architects, verification lead, and design and test engineers to verify RTL design, ensuring adequate coverage and maximizing reusability.
• Develop verification plans, test benches, and UVM components to ensure code/functional coverage from block to full chip level simulation.
• Perform requirement traceability via Test Performance Specification (TPS) and capture results in Test Acceptance Report (TAR).
• Contribute to continuous improvement and optimization of the UVM structure.

What You Bring

• Bachelor’s with 5+ years of relevant industry experience, or Master’s with 3+ years or PhD in data science engineering or related technical field preferred
• Solid knowledge of SystemVerilog, UVM, Verilog, and Perl/Python
• Exposure to PCIe, CXL, DDR, NVMe, TCP/IP, Ethernet protocols
• Exposure to ARM subsystems, AXI, AHB protocols
• Knowledge of design verification and functional coverage.
• Demonstrated ability with FPGA design tool flows, synthesis, timing analysis, partitioning, FPGA programming, bring-up, and testing.
• In-depth background in HDL development, Verilog coding, integration, synthesis, debugging, simulation, test bench creation, and debugging using CAD tools (Synopsys, Mentor, Cadence, or FPGA tools)
• Hands-on lab prototype setup, testing, measurement, and debugging of storage solutions on FPGAs
• Hands-on experience with hardware board bring-up, server system integration, and software integration with FPGAs
• Familiar with Altera Agilex SoC/Xilinx FPGA target verification.
• Experience using UVM framework and associated tooling environments. 
• Proficiency with Python is a plus.
• Familiar with revision control systems and platforms such as Git and Gitlab.
• You’re inclusive, adapting your style to the situation and diverse global norms of our people.
• An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
• You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
• Innovative and creative, you proactively explore new ideas and adapt quickly to change.

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