Job Posting Title:
Process Engineer I, II, or Senior, Texas Institute for Electronics
----
Hiring Department:
Texas Institute for Electronics
----
Position Open To:
All Applicants
----
Weekly Scheduled Hours:
40
----
FLSA Status:
To Be Determined at Offer
----
Earliest Start Date:
Ongoing
----
Position Duration:
Expected to Continue
----
Location:
PICKLE RESEARCH CAMPUS
----
Job Details:
General Notes
This position may be filled at a higher-level title, relative to experience and qualifications of the selected candidate.
About Us
The Texas Institute for Electronics (TIE) is a University of Texas at Austin-supported semiconductor consortium of state and local government, preeminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth.
Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing.
With over $1 billion in funding from the US DoD and the state of Texas, we’re at the forefront of creating cutting-edge semiconductor manufacturing equipment and processes that will set the course for future advancements in semiconductor logic, memory, heterogeneous integration, chip cooling and more. Situated in the heart of Austin — named “America’s Coolest City” by Expedia and “The Best Place to Live in the U.S.” by U.S. News and World Report — the Texas Institute for Electronics embodies the city’s innovative spirit.
UT Austin, recognized by Forbes as one of America’s Best Large Employers, provides outstanding employee benefits and total rewards packages that include:
Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access through LinkedIn Learning plus professional conference opportunities
Tuition assistance
Expansive employee discount program including athletic tickets
Free access to UT Austin's libraries and museums with staff ID card
Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card
For more details, please see: Benefits | Human Resources and UT Austin Employee Experience | Human Resources
Purpose
The Process Engineer I, II, or Seniordevelops and executes semiconductor fabrication process flows for advanced 3D HI applications using a wide variety of internal and external fabrication resources.
Responsibilities
- Running, developing and integrating semiconductor fabrication processes across a wide variety of semiconductor equipment. This would include running experiments, performing detailed process characterization, performing data analysis, documentation of processes of record, presentation of results, and incorporating feedback from engineers/techs.
- Developing processes-of-record and implementing these on product samples for customers.
- Assisting with documents such as proposals or reports on costs and inventory levels.
Required Qualifications
Process Engineer I:
High School Diploma or GED and at least ten years of experience in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines, or, Bachelor's degree in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines and at least six years of relevant experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection.
Process Engineer II:
Bachelor's degree in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines and eight years of relevant experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection, or, Master's degree in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines and six years of relevant experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection.
Senior Process Engineer:
Bachelor’s degree in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines and ten years of experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection, or
Master's degree in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or other relevant disciplines and eight years of relevant experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection, or PhD in materials science, physics, chemistry, chemical engineering, electrical engineering, mechanical engineering, or another relevant discipline.
For all levels:
- Goal-oriented and ability to prioritize and multitask.
- Demonstrated excellent written and verbal communication skills.
- Demonstrated ability to work successfully in a collaborative team environment.
- Ability to work effectively in a dynamic and fast paced environment.
Relevant education and experience may be substituted as appropriate.
Preferred Qualifications
Process Engineer I:
Three years of experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection.
Process Engineer II:
Master's degree or higher. Five or more years of relevant experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection.
Senior Process Engineer:
Master's degree or higher. Ten or more years of experience in nanofabrication and exposure to wafer processing and characterization in cleanrooms, including experience working with standard semiconductor equipment for lithography, coating, plasma processes including deposition and etch, wet cleans, electroplating, annealing, chemical mechanical polishing, bonding, packaging, metrology and inspection.
For all levels:
- Experience working in a research or start-up environment.
- Experience with programmatic layout creation software such as KLayout.
Salary Range
TIE pays industry-competitive salaries
Working Conditions
- Work is performed on-site in a scientific research environment, with dynamic work conditions and frequent interruptions.
- Work outside standard office hours could be required on an occasional basis during peak periods and special events.
- May work around standard office conditions
- May work around chemicals
- Repetitive use of a keyboard at a workstation
- Use of manual dexterity (ex: using a mouse)
- May work in a cleanroom environment.
Required Materials
- Resume/CV
- 3 work references with their contact information; at least one reference should be from a supervisor
- Letter of interest
Important for applicants who are NOT current university employees or contingent workers: You will be prompted to submit your resume the first time you apply, then you will be provided an option to upload a new Resume for subsequent applications. Any additional Required Materials (letter of interest, references, etc.) will be uploaded in the Application Questions section; you will be able to multi-select additional files. Before submitting your online job application, ensure that ALL Required Materials have been uploaded. Once your job application has been submitted, you cannot make changes.
Important for Current university employees and contingent workers: As a current university employee or contingent worker, you MUST apply within Workday by searching for Find UT Jobs. If you are a current University employee, log-in to Workday, navigate to your Worker Profile, click the Career link in the left hand navigation menu and then update the sections in your Professional Profile before you apply. This information will be pulled in to your application. The application is one page and you will be prompted to upload your resume. In addition, you must respond to the application questions presented to upload any additional Required Materials (letter of interest, references, etc.) that were noted above.
----
Employment Eligibility:
Regular staff who have been employed in their current position for the last six continuous months are eligible for openings being recruited for through University-Wide or Open Recruiting, to include both promotional opportunities and lateral transfers. Staff who are promotion/transfer eligible may apply for positions without supervisor approval.
----
Retirement Plan Eligibility:
The retirement plan for this position is Teacher Retirement System of Texas (TRS), subject to the position being at least 20 hours per week and at least 135 days in length. This position may have the option to elect the Optional Retirement Program (ORP) instead of TRS, dependent upon the job profile you qualify for, and subject to the position being 40 hours per week and at least 135 days in length.
----
Background Checks:
A criminal history background check will be required for finalist(s) under consideration for this position.
----
Equal Opportunity Employer:
The University of Texas at Austin, as an equal opportunity/affirmative action employer, complies with all applicable federal and state laws regarding nondiscrimination and affirmative action. The University is committed to a policy of equal opportunity for all persons and does not discriminate on the basis of race, color, national origin, age, marital status, sex, sexual orientation, gender identity, gender expression, disability, religion, or veteran status in employment, educational programs and activities, and admissions.
----
Pay Transparency:
The University of Texas at Austin will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. However, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the contractor’s legal duty to furnish information.
----
Employment Eligibility Verification:
If hired, you will be required to complete the federal Employment Eligibility Verification I-9 form. You will be required to present acceptable and original documents to prove your identity and authorization to work in the United States. Documents need to be presented no later than the third day of employment. Failure to do so will result in loss of employment at the university.
----
E-Verify:
The University of Texas at Austin use E-Verify to check the work authorization of all new hires effective May 2015. The university’s company ID number for purposes of E-Verify is 854197. For more information about E-Verify, please see the following:
----
Compliance:
Employees may be required to report violations of law under Title IX and the Jeanne Clery Disclosure of Campus Security Policy and Crime Statistics Act (Clery Act). If this position is identified a Campus Security Authority (Clery Act), you will be notified and provided resources for reporting. Responsible employees under Title IX are defined and outlined in HOP-3031.
The Clery Act requires all prospective employees be notified of the availability of the Annual Security and Fire Safety report. You may access the most recent report here or obtain a copy at University Compliance Services, 1616 Guadalupe Street, UTA 2.206, Austin, Texas 78701.
Process Engineering