Principal Engineer

Job Description

Job Summary:

In this position, you will drive the development of the next-generation solid-state drive products. You will be responsible for delivering subsystem specifications and test specs. Your primary role will be to determine the most optimal solution considering technical, cost, and schedule tradeoffs. This role requires close collaboration with ASIC, HW, Firmware, and Validation teams to navigate technical challenges and identify the most beneficial solutions. You will be tasked to build a small team to support the development and bring-up of next-generation products from a systems engineering perspective.

Key Responsibilities:

• As a Design Engineer in the Enterprise SSD System Design and Architecture Group you will design and implement system requirements for SSD products, based on PCIe/NVMe protocols.
• Lead product development role from Inception to High Volume manufacturing.
• Activities include setting up and enhancing the PCIe validation test environment, creating test plans, developing and executing these.
• Collaborates with Firmware and ASIC engineers to explore performance and power trade-offs upon different use-cases and system conditions.
• Determines specs and working parameters for ASIC / FW compatibility.
• Coordinates design of subsystems and integration of the overall system. Identifies, analyzes and resolves product deficiencies.
• Analysis of new technologies, and drive of design decisions based on both empirical and theoretical data.
• Ability to troubleshoot and analyze complex problems.

You will work closely with excellent colleague engineers, cope with complex challenges, innovate, and develop products that will be sold in millions of units.

Qualifications

• Hands-on experience in Firmware and ASIC-design Subgroups
• SoC architectural level understanding
• Strong working knowledge of PCIe standards and good understanding of processor architecture like ARM/ARC or similar
• Debug skills using lab equipment like high-speed PCIE protocol analyzer and oscilloscopes.
• Hands-on experience with firmware and/or hardware Design
• Ability to write/debug firmware with C/C++, Python
• Hardware experience with NVME, DDR and/or Power Supplies