Full-Time

IC Physical Layout Engineer

Confirmed live in the last 24 hours

HRL Laboratories

HRL Laboratories

501-1,000 employees

Advances in quantum science and additive manufacturing

Food & Agriculture
Hardware
Industrial & Manufacturing
Energy
Aerospace

Compensation Overview

$99,705 - $124,683Annually

+ Bonus + Benefits

Junior, Mid

Malibu, CA, USA

Requirements
  • At least 3 years of experience in physical layout design across a variety of silicon and III-V semiconductor IC technologies.
  • Experience with Cadence Virtuoso, Calibre DRC/LVS/LPE, Assura.
  • Knowledge of deep sub-micron layout design practices such as metal density rules, transistor, and capacitor matching.
  • Ability to communicate effectively with circuit designers to flow down layout requirements.
  • Experience customizing and generating standard cells for automated digital design flows is a bonus.
  • BS or MS., Electrical Engineering, Computer Science, or Related Discipline.
  • U.S. citizenship is required. Must be able to obtain and maintain a security clearance. Active SSBI is a plus.
Responsibilities
  • Perform floor-planning and layout of block and chip-level designs in a variety of semiconductor IC technologies.
  • Support full chip integration and mask-reticle assembly.

HRL Laboratories excels in advancing technologies across several critical sectors, including quantum science, additive manufacturing, and semiconductor industries. Their commitment to developing groundbreaking products such as silicon quantum dot devices and 3D-printable aluminum alloys positions them as a leader in technological innovation. This fosters a workplace environment that encourages innovative thinking and problem-solving among its employees, making it an attractive place for professionals eager to contribute to cutting-edge research and development.

Company Stage

Grant

Total Funding

$2M

Headquarters

Malibu, California

Founded

1997

Growth & Insights
Headcount

6 month growth

4%

1 year growth

22%

2 year growth

34%