What You’ll Achieve:

• Strategize and execute processor subsystem verification efforts across verification platforms
• Review architecture and microarchitecture specs and influence design/microarchitecture decisions
• Define verification strategy and test plans for cache coherency subsystem verification
• Architect and lead development of verification collateral including test benches, random test generators and checkers
• Lead and contribute to day-to-day execution of all verification activities to meet tape out quality requirements
• Define post-si validation plans and debug post-silicon system level failures
• Mentor/guide the work of other engineers to achieve project goals. 

• MS or BS in Electrical Engineering or Computer Engineering.
• Minimum 8 years (with MS) or 12 years (with BS) of IP and subsystem design verification experience preferably in CPU or Graphics cores
• Solid understanding of high-performance microprocessor/computer microarchitecture, OOO execution and cache coherency concepts
• Knowledge of ARM interconnect or other high performance interconnect protocols
• Experienced in building new verification test benches using industry standard languages like System Verilog, SVTB, UVM/OVM and simulation tools
• Programming experience in languages common to the industry (e.g., C, C++, Perl, Python) and experience automating design verification tasks
• Knowledge of ARM or x86 architecture and assembly language programming
• Good written and verbal communication skills, excellent attention to detail, strong analytical/problem solving skills
• Experience in formal verification is a plus.

What we’ll offer:

• Premium medical, dental, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.

• Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.

• A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.